f181011359
The kernel patch was merged to support pci resource mapping. https://patchwork.kernel.org/patch/9677441/ So enable igu_uio in the default arm64 configuration. Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
52 lines
2.1 KiB
Plaintext
52 lines
2.1 KiB
Plaintext
# BSD LICENSE
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#
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# Copyright (C) Cavium, Inc 2017. All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of Cavium, Inc nor the names of its
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# contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#include "common_linuxapp"
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CONFIG_RTE_MACHINE="armv8a"
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CONFIG_RTE_ARCH="arm64"
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CONFIG_RTE_ARCH_ARM64=y
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CONFIG_RTE_ARCH_64=y
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CONFIG_RTE_FORCE_INTRINSICS=y
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# Maximum available cache line size in arm64 implementations.
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# Setting to maximum available cache line size in generic config
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# to address minimum DMA alignment across all arm64 implementations.
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CONFIG_RTE_CACHE_LINE_SIZE=128
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CONFIG_RTE_LIBRTE_FM10K_PMD=n
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CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
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CONFIG_RTE_LIBRTE_AVP_PMD=n
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CONFIG_RTE_SCHED_VECTOR=n
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