365fb925d3
With Hotplugging memory support, the order of memseg has been changed from physically contiguous to virtual contiguous. FSLMC bus and dpaa2 drivers depend on PA to VA address conversion when in Physical addressing mode. This patch creates a list of blocks requested to be pinned to the DPAA2 mempool. For searching physical addresses, it is expected that it would belong to this list (from hardware pool) and hence it is less expensive than memseg walks. Though, this has marginal impact on performance vis-a-vis legacy mode with physically contiguous memsegs. Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
42 lines
1.1 KiB
Makefile
42 lines
1.1 KiB
Makefile
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright 2017 NXP
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#
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include $(RTE_SDK)/mk/rte.vars.mk
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#
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# library name
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#
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LIB = librte_pmd_dpaa2_event.a
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CFLAGS += $(WERROR_FLAGS)
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CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc
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CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/qbman/include
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CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/mc
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CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/portal
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CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa2
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CFLAGS += -I$(RTE_SDK)/drivers/event/dpaa2
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CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
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LDLIBS += -lrte_eal -lrte_eventdev
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LDLIBS += -lrte_bus_fslmc -lrte_mempool_dpaa2 -lrte_pmd_dpaa2
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LDLIBS += -lrte_bus_vdev
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CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2
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CFLAGS += -I$(RTE_SDK)/drivers/net/dpaa2/mc
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# versioning export map
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EXPORT_MAP := rte_pmd_dpaa2_event_version.map
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LIBABIVER := 1
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# depends on fslmc bus which uses experimental API
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CFLAGS += -DALLOW_EXPERIMENTAL_API
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#
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# all source are stored in SRCS-y
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#
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SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2_hw_dpcon.c
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SRCS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV) += dpaa2_eventdev.c
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include $(RTE_SDK)/mk/rte.lib.mk
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