81fd15a2ac
Register "dev_configure" API to configure/initialize the SDP VF PCIe devices. Signed-off-by: Mahipal Challa <mchalla@marvell.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
258 lines
4.8 KiB
C
258 lines
4.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include <rte_atomic.h>
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#include <rte_malloc.h>
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#include <rte_log.h>
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#include "otx2_common.h"
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#include "otx2_dev.h"
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#include "otx2_mbox.h"
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/**
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* @internal
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* Set default NPA configuration.
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*/
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void
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otx2_npa_set_defaults(struct otx2_idev_cfg *idev)
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{
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idev->npa_pf_func = 0;
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rte_atomic16_set(&idev->npa_refcnt, 0);
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}
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/**
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* @internal
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* Get intra device config structure.
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*/
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struct otx2_idev_cfg *
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otx2_intra_dev_get_cfg(void)
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{
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const char name[] = "octeontx2_intra_device_conf";
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const struct rte_memzone *mz;
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struct otx2_idev_cfg *idev;
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mz = rte_memzone_lookup(name);
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if (mz != NULL)
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return mz->addr;
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/* Request for the first time */
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mz = rte_memzone_reserve_aligned(name, sizeof(struct otx2_idev_cfg),
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SOCKET_ID_ANY, 0, OTX2_ALIGN);
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if (mz != NULL) {
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idev = mz->addr;
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idev->sso_pf_func = 0;
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idev->npa_lf = NULL;
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otx2_npa_set_defaults(idev);
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return idev;
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}
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return NULL;
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}
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/**
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* @internal
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* Get SSO PF_FUNC.
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*/
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uint16_t
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otx2_sso_pf_func_get(void)
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{
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struct otx2_idev_cfg *idev;
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uint16_t sso_pf_func;
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sso_pf_func = 0;
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idev = otx2_intra_dev_get_cfg();
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if (idev != NULL)
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sso_pf_func = idev->sso_pf_func;
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return sso_pf_func;
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}
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/**
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* @internal
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* Set SSO PF_FUNC.
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*/
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void
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otx2_sso_pf_func_set(uint16_t sso_pf_func)
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{
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struct otx2_idev_cfg *idev;
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idev = otx2_intra_dev_get_cfg();
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if (idev != NULL) {
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idev->sso_pf_func = sso_pf_func;
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rte_smp_wmb();
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}
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}
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/**
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* @internal
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* Get NPA PF_FUNC.
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*/
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uint16_t
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otx2_npa_pf_func_get(void)
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{
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struct otx2_idev_cfg *idev;
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uint16_t npa_pf_func;
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npa_pf_func = 0;
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idev = otx2_intra_dev_get_cfg();
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if (idev != NULL)
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npa_pf_func = idev->npa_pf_func;
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return npa_pf_func;
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}
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/**
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* @internal
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* Get NPA lf object.
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*/
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struct otx2_npa_lf *
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otx2_npa_lf_obj_get(void)
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{
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struct otx2_idev_cfg *idev;
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idev = otx2_intra_dev_get_cfg();
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if (idev != NULL && rte_atomic16_read(&idev->npa_refcnt))
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return idev->npa_lf;
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return NULL;
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}
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/**
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* @internal
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* Is NPA lf active for the given device?.
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*/
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int
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otx2_npa_lf_active(void *otx2_dev)
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{
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struct otx2_dev *dev = otx2_dev;
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struct otx2_idev_cfg *idev;
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/* Check if npalf is actively used on this dev */
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idev = otx2_intra_dev_get_cfg();
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if (!idev || !idev->npa_lf || idev->npa_lf->mbox != dev->mbox)
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return 0;
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return rte_atomic16_read(&idev->npa_refcnt);
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}
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/*
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* @internal
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* Gets reference only to existing NPA LF object.
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*/
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int otx2_npa_lf_obj_ref(void)
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{
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struct otx2_idev_cfg *idev;
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uint16_t cnt;
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int rc;
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idev = otx2_intra_dev_get_cfg();
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/* Check if ref not possible */
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if (idev == NULL)
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return -EINVAL;
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/* Get ref only if > 0 */
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cnt = rte_atomic16_read(&idev->npa_refcnt);
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while (cnt != 0) {
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rc = rte_atomic16_cmpset(&idev->npa_refcnt_u16, cnt, cnt + 1);
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if (rc)
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break;
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cnt = rte_atomic16_read(&idev->npa_refcnt);
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}
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return cnt ? 0 : -EINVAL;
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}
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/**
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* @internal
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*/
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int otx2_logtype_base;
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/**
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* @internal
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*/
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int otx2_logtype_mbox;
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/**
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* @internal
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*/
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int otx2_logtype_npa;
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/**
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* @internal
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*/
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int otx2_logtype_nix;
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/**
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* @internal
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*/
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int otx2_logtype_npc;
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/**
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* @internal
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*/
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int otx2_logtype_tm;
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/**
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* @internal
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*/
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int otx2_logtype_sso;
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/**
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* @internal
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*/
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int otx2_logtype_tim;
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/**
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* @internal
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*/
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int otx2_logtype_dpi;
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/**
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* @internal
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*/
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int otx2_logtype_ep;
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RTE_INIT(otx2_log_init);
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static void
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otx2_log_init(void)
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{
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otx2_logtype_base = rte_log_register("pmd.octeontx2.base");
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if (otx2_logtype_base >= 0)
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rte_log_set_level(otx2_logtype_base, RTE_LOG_NOTICE);
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otx2_logtype_mbox = rte_log_register("pmd.octeontx2.mbox");
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if (otx2_logtype_mbox >= 0)
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rte_log_set_level(otx2_logtype_mbox, RTE_LOG_NOTICE);
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otx2_logtype_npa = rte_log_register("pmd.mempool.octeontx2");
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if (otx2_logtype_npa >= 0)
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rte_log_set_level(otx2_logtype_npa, RTE_LOG_NOTICE);
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otx2_logtype_nix = rte_log_register("pmd.net.octeontx2");
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if (otx2_logtype_nix >= 0)
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rte_log_set_level(otx2_logtype_nix, RTE_LOG_NOTICE);
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otx2_logtype_npc = rte_log_register("pmd.net.octeontx2.flow");
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if (otx2_logtype_npc >= 0)
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rte_log_set_level(otx2_logtype_npc, RTE_LOG_NOTICE);
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otx2_logtype_tm = rte_log_register("pmd.net.octeontx2.tm");
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if (otx2_logtype_tm >= 0)
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rte_log_set_level(otx2_logtype_tm, RTE_LOG_NOTICE);
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otx2_logtype_sso = rte_log_register("pmd.event.octeontx2");
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if (otx2_logtype_sso >= 0)
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rte_log_set_level(otx2_logtype_sso, RTE_LOG_NOTICE);
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otx2_logtype_tim = rte_log_register("pmd.event.octeontx2.timer");
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if (otx2_logtype_tim >= 0)
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rte_log_set_level(otx2_logtype_tim, RTE_LOG_NOTICE);
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otx2_logtype_dpi = rte_log_register("pmd.raw.octeontx2.dpi");
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if (otx2_logtype_dpi >= 0)
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rte_log_set_level(otx2_logtype_dpi, RTE_LOG_NOTICE);
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otx2_logtype_ep = rte_log_register("pmd.raw.octeontx2.ep");
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if (otx2_logtype_ep >= 0)
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rte_log_set_level(otx2_logtype_ep, RTE_LOG_NOTICE);
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}
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