numam-dpdk/drivers/net/mlx5
Yongseok Koh 974f1e7ef1 net/mlx5: add new memory region support
This is the new design of Memory Region (MR) for mlx PMD, in order to:
- Accommodate the new memory hotplug model.
- Support non-contiguous Mempool.

There are multiple layers for MR search.

L0 is to look up the last-hit entry which is pointed by mr_ctrl->mru (Most
Recently Used). If L0 misses, L1 is to look up the address in a fixed-sized
array by linear search. L0/L1 is in an inline function -
mlx5_mr_lookup_cache().

If L1 misses, the bottom-half function is called to look up the address
from the bigger local cache of the queue. This is L2 - mlx5_mr_addr2mr_bh()
and it is not an inline function. Data structure for L2 is the Binary Tree.

If L2 misses, the search falls into the slowest path which takes locks in
order to access global device cache (priv->mr.cache) which is also a B-tree
and caches the original MR list (priv->mr.mr_list) of the device. Unless
the global cache is overflowed, it is all-inclusive of the MR list. This is
L3 - mlx5_mr_lookup_dev(). The size of the L3 cache table is limited and
can't be expanded on the fly due to deadlock. Refer to the comments in the
code for the details - mr_lookup_dev(). If L3 is overflowed, the list will
have to be searched directly bypassing the cache although it is slower.

If L3 misses, a new MR for the address should be created -
mlx5_mr_create(). When it creates a new MR, it tries to register adjacent
memsegs as much as possible which are virtually contiguous around the
address. This must take two locks - memory_hotplug_lock and
priv->mr.rwlock. Due to memory_hotplug_lock, there can't be any
allocation/free of memory inside.

In the free callback of the memory hotplug event, freed space is searched
from the MR list and corresponding bits are cleared from the bitmap of MRs.
This can fragment a MR and the MR will have multiple search entries in the
caches. Once there's a change by the event, the global cache must be
rebuilt and all the per-queue caches will be flushed as well. If memory is
frequently freed in run-time, that may cause jitter on dataplane processing
in the worst case by incurring MR cache flush and rebuild. But, it would be
the least probable scenario.

To guarantee the most optimal performance, it is highly recommended to use
an EAL option - '--socket-mem'. Then, the reserved memory will be pinned
and won't be freed dynamically. And it is also recommended to configure
per-lcore cache of Mempool. Even though there're many MRs for a device or
MRs are highly fragmented, the cache of Mempool will be much helpful to
reduce misses on per-queue caches anyway.

'--legacy-mem' is also supported.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-05-14 22:31:51 +01:00
..
Makefile net/mlx5: remove memory region support 2018-05-14 22:31:51 +01:00
mlx5_defs.h net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_ethdev.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_flow.c net/mlx5: change device reference for secondary process 2018-05-14 22:31:51 +01:00
mlx5_glue.c net/mlx5: support tunnel RSS level 2018-04-27 18:00:56 +01:00
mlx5_glue.h net/mlx5: support tunnel RSS level 2018-04-27 18:00:56 +01:00
mlx5_mac.c net/mlx5: implement multicast add list devop 2018-04-27 17:34:43 +01:00
mlx5_mr.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_mr.h net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_nl.c net/mlx5: use Netlink to enable promisc/allmulti mode 2018-04-14 00:41:44 +02:00
mlx5_prm.h net/mlx5: support generic tunnel offloading 2018-04-27 17:34:43 +01:00
mlx5_rss.c align SPDX Mellanox copyrights 2018-04-11 01:47:47 +02:00
mlx5_rxmode.c net/mlx5: use Netlink to enable promisc/allmulti mode 2018-04-14 00:41:44 +02:00
mlx5_rxq.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_rxtx_vec_neon.h net/mlx5: support Rx tunnel type identification 2018-04-27 18:00:56 +01:00
mlx5_rxtx_vec_sse.h net/mlx5: support Rx tunnel type identification 2018-04-27 18:00:56 +01:00
mlx5_rxtx_vec.c net/mlx5: support generic tunnel offloading 2018-04-27 17:34:43 +01:00
mlx5_rxtx_vec.h net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_rxtx.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_rxtx.h net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_socket.c net/mlx5: fix socket connection return value 2018-05-14 22:31:48 +01:00
mlx5_stats.c align SPDX Mellanox copyrights 2018-04-11 01:47:47 +02:00
mlx5_trigger.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_txq.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5_utils.h net/mlx5: add hardware flow debug dump 2018-04-27 18:00:56 +01:00
mlx5_vlan.c align SPDX Mellanox copyrights 2018-04-11 01:47:47 +02:00
mlx5.c net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
mlx5.h net/mlx5: add new memory region support 2018-05-14 22:31:51 +01:00
rte_pmd_mlx5_version.map mlx5: introduce new driver for Mellanox ConnectX-4 adapters 2015-10-30 22:03:42 +01:00