107 lines
3.6 KiB
C
107 lines
3.6 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
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* Copyright (c) 2016 NXP. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Freescale Semiconductor, Inc nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DPAA2_ETHDEV_H
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#define _DPAA2_ETHDEV_H
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#include <mc/fsl_dpni.h>
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#include <mc/fsl_mc_sys.h>
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#define DPAA2_MIN_RX_BUF_SIZE 512
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#define DPAA2_MAX_RX_PKT_LEN 10240 /*WRIOP support*/
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#define MAX_TCS DPNI_MAX_TC
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#define MAX_RX_QUEUES 16
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#define MAX_TX_QUEUES 16
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/*default tc to be used for ,congestion, distribution etc configuration. */
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#define DPAA2_DEF_TC 0
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/* Threshold for a queue to *Enter* Congestion state.
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* It is set to 32KB
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*/
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#define CONG_ENTER_TX_THRESHOLD (32 * 1024)
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/* Threshold for a queue to *Exit* Congestion state.
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*/
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#define CONG_EXIT_TX_THRESHOLD (24 * 1024)
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/* RX queue tail drop threshold
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* currently considering 32 KB packets
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*/
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#define CONG_THRESHOLD_RX_Q (32 * 1024)
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/* Size of the input SMMU mapped memory required by MC */
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#define DIST_PARAM_IOVA_SIZE 256
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/* Enable TX Congestion control support
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* default is disable
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*/
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#define DPAA2_TX_CGR_SUPPORT 0x01
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/* Disable RX tail drop, default is enable */
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#define DPAA2_RX_TAILDROP_OFF 0x04
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struct dpaa2_dev_priv {
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void *hw;
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int32_t hw_id;
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int32_t qdid;
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uint16_t token;
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uint8_t nb_tx_queues;
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uint8_t nb_rx_queues;
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void *rx_vq[MAX_RX_QUEUES];
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void *tx_vq[MAX_TX_QUEUES];
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struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */
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uint32_t options;
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uint16_t num_dist_per_tc[MAX_TCS];
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uint8_t max_mac_filters;
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uint8_t max_vlan_filters;
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uint8_t num_tc;
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uint8_t flags; /*dpaa2 config flags */
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};
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int dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
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uint32_t req_dist_set);
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int dpaa2_remove_flow_dist(struct rte_eth_dev *eth_dev,
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uint8_t tc_index);
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int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv, void *blist);
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uint16_t dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs,
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uint16_t nb_pkts);
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uint16_t dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
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uint16_t dummy_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
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#endif /* _DPAA2_ETHDEV_H */
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