numam-dpdk/drivers
Pavan Nikhilesh 9c96ff7696 event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
	--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:23 +02:00
..
baseband bb/turbo_sw: update for FlexRAN 18.09 2018-12-19 11:19:10 +01:00
bus drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
common drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
compress drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
crypto drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
event event/octeontx2: add devargs to control SSO GGRP QoS 2019-07-03 06:56:23 +02:00
mempool drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
net drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
raw drivers: add reasons for components being disabled 2019-07-02 23:21:11 +02:00
Makefile
meson.build build: print list of disabled components 2019-07-02 23:20:26 +02:00