dfacd1f9f7
This patch adds the device control functions. Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
44 lines
892 B
C
44 lines
892 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (C) 2019 Marvell International Ltd.
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*/
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#ifndef _OTX2_CRYPTODEV_H_
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#define _OTX2_CRYPTODEV_H_
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#include "cpt_common.h"
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#include "otx2_dev.h"
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/* Marvell OCTEON TX2 Crypto PMD device name */
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#define CRYPTODEV_NAME_OCTEONTX2_PMD crypto_octeontx2
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#define OTX2_CPT_MAX_LFS 64
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#define OTX2_CPT_MAX_QUEUES_PER_VF 64
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/**
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* Device private data
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*/
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struct otx2_cpt_vf {
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struct otx2_dev otx2_dev;
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/**< Base class */
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uint16_t max_queues;
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/**< Max queues supported */
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uint8_t nb_queues;
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/**< Number of crypto queues attached */
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uint16_t lf_msixoff[OTX2_CPT_MAX_LFS];
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/**< MSI-X offsets */
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uint8_t err_intr_registered:1;
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/**< Are error interrupts registered? */
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};
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#define CPT_LOGTYPE otx2_cpt_logtype
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extern int otx2_cpt_logtype;
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/*
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* Crypto device driver ID
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*/
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uint8_t otx2_cryptodev_driver_id;
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#endif /* _OTX2_CRYPTODEV_H_ */
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