e307e65b3f
Use port type to determine the supported speed capabilities.
Fixes: e274f57322 ("ethdev: add speed capabilities")
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
66 lines
2.9 KiB
C
66 lines
2.9 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2014-2017 Chelsio Communications.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Chelsio Communications nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _CXGBE_H_
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#define _CXGBE_H_
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#include "common.h"
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#include "t4_regs.h"
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#define CXGBE_MIN_RING_DESC_SIZE 128 /* Min TX/RX descriptor ring size */
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#define CXGBE_MAX_RING_DESC_SIZE 4096 /* Max TX/RX descriptor ring size */
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#define CXGBE_DEFAULT_TX_DESC_SIZE 1024 /* Default TX ring size */
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#define CXGBE_DEFAULT_RX_DESC_SIZE 1024 /* Default RX ring size */
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#define CXGBE_MIN_RX_BUFSIZE ETHER_MIN_MTU /* min buf size */
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#define CXGBE_MAX_RX_PKTLEN (9000 + ETHER_HDR_LEN + ETHER_CRC_LEN) /* max pkt */
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int cxgbe_probe(struct adapter *adapter);
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void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps);
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int cxgbe_up(struct adapter *adap);
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int cxgbe_down(struct port_info *pi);
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void cxgbe_close(struct adapter *adapter);
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void cxgbe_stats_get(struct port_info *pi, struct port_stats *stats);
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void cxgbe_stats_reset(struct port_info *pi);
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int link_start(struct port_info *pi);
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void init_rspq(struct adapter *adap, struct sge_rspq *q, unsigned int us,
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unsigned int cnt, unsigned int size, unsigned int iqe_size);
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int setup_sge_fwevtq(struct adapter *adapter);
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void cfg_queues(struct rte_eth_dev *eth_dev);
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int cfg_queue_count(struct rte_eth_dev *eth_dev);
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int setup_rss(struct port_info *pi);
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void cxgbe_enable_rx_queues(struct port_info *pi);
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#endif /* _CXGBE_H_ */
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