d52e042850
This patch fixes coverity issues regard to error check.
Coverity issue: 354227, 354232, 354238, 354239, 354240
Fixes: aaf58cb85b
("examples/l3fwd: add event port and queue setup")
Cc: stable@dpdk.org
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
268 lines
7.1 KiB
C
268 lines
7.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include <stdbool.h>
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#include <getopt.h>
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#include <rte_malloc.h>
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#include "l3fwd.h"
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#include "l3fwd_event.h"
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static void
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print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)
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{
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char buf[RTE_ETHER_ADDR_FMT_SIZE];
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rte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);
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printf("%s%s", name, buf);
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}
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struct l3fwd_event_resources *
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l3fwd_get_eventdev_rsrc(void)
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{
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static struct l3fwd_event_resources *rsrc;
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if (rsrc != NULL)
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return rsrc;
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rsrc = rte_zmalloc("l3fwd", sizeof(struct l3fwd_event_resources), 0);
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if (rsrc != NULL) {
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rsrc->sched_type = RTE_SCHED_TYPE_ATOMIC;
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rsrc->eth_rx_queues = 1;
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return rsrc;
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}
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rte_exit(EXIT_FAILURE, "Unable to allocate memory for eventdev cfg\n");
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return NULL;
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}
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static void
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l3fwd_eth_dev_port_setup(struct rte_eth_conf *port_conf)
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{
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struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
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uint16_t nb_ports = rte_eth_dev_count_avail();
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uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
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uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
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unsigned int nb_lcores = rte_lcore_count();
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struct rte_eth_conf local_port_conf;
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struct rte_eth_dev_info dev_info;
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struct rte_eth_txconf txconf;
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struct rte_eth_rxconf rxconf;
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unsigned int nb_mbuf;
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uint16_t port_id;
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uint8_t eth_qid;
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int32_t ret;
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/* initialize all ports */
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RTE_ETH_FOREACH_DEV(port_id) {
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local_port_conf = *port_conf;
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/* skip ports that are not enabled */
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if ((evt_rsrc->port_mask & (1 << port_id)) == 0) {
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printf("\nSkipping disabled port %d\n", port_id);
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continue;
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}
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/* init port */
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printf("Initializing port %d ... ", port_id);
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fflush(stdout);
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printf("Creating queues: nb_rxq=%d nb_txq=1...\n",
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evt_rsrc->eth_rx_queues);
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ret = rte_eth_dev_info_get(port_id, &dev_info);
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if (ret != 0)
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rte_panic("Error during getting device (port %u) info:"
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"%s\n", port_id, strerror(-ret));
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if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
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local_port_conf.txmode.offloads |=
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DEV_TX_OFFLOAD_MBUF_FAST_FREE;
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local_port_conf.rx_adv_conf.rss_conf.rss_hf &=
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dev_info.flow_type_rss_offloads;
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if (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=
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port_conf->rx_adv_conf.rss_conf.rss_hf) {
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printf("Port %u modified RSS hash function "
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"based on hardware support,"
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"requested:%#"PRIx64" configured:%#"PRIx64"\n",
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port_id,
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port_conf->rx_adv_conf.rss_conf.rss_hf,
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local_port_conf.rx_adv_conf.rss_conf.rss_hf);
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}
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ret = rte_eth_dev_configure(port_id, evt_rsrc->eth_rx_queues,
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1, &local_port_conf);
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if (ret < 0)
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rte_exit(EXIT_FAILURE,
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"Cannot configure device: err=%d, port=%d\n",
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ret, port_id);
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ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_id, &nb_rxd,
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&nb_txd);
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if (ret < 0)
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rte_exit(EXIT_FAILURE,
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"Cannot adjust number of descriptors: err=%d, "
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"port=%d\n", ret, port_id);
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rte_eth_macaddr_get(port_id, &ports_eth_addr[port_id]);
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print_ethaddr(" Address:", &ports_eth_addr[port_id]);
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printf(", ");
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print_ethaddr("Destination:",
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(const struct rte_ether_addr *)&dest_eth_addr[port_id]);
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printf(", ");
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/* prepare source MAC for each port. */
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rte_ether_addr_copy(&ports_eth_addr[port_id],
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(struct rte_ether_addr *)(val_eth + port_id) + 1);
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/* init memory */
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if (!evt_rsrc->per_port_pool) {
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/* port_id = 0; this is *not* signifying the first port,
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* rather, it signifies that port_id is ignored.
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*/
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nb_mbuf = RTE_MAX(nb_ports * nb_rxd +
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nb_ports * nb_txd +
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nb_ports * nb_lcores *
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MAX_PKT_BURST +
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nb_lcores * MEMPOOL_CACHE_SIZE,
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8192u);
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ret = init_mem(0, nb_mbuf);
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} else {
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nb_mbuf = RTE_MAX(nb_rxd + nb_rxd +
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nb_lcores * MAX_PKT_BURST +
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nb_lcores * MEMPOOL_CACHE_SIZE,
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8192u);
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ret = init_mem(port_id, nb_mbuf);
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}
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/* init Rx queues per port */
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rxconf = dev_info.default_rxconf;
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rxconf.offloads = local_port_conf.rxmode.offloads;
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for (eth_qid = 0; eth_qid < evt_rsrc->eth_rx_queues;
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eth_qid++) {
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if (!evt_rsrc->per_port_pool)
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ret = rte_eth_rx_queue_setup(port_id, eth_qid,
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nb_rxd, 0, &rxconf,
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evt_rsrc->pkt_pool[0][0]);
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else
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ret = rte_eth_rx_queue_setup(port_id, eth_qid,
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nb_rxd, 0, &rxconf,
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evt_rsrc->pkt_pool[port_id][0]);
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if (ret < 0)
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rte_exit(EXIT_FAILURE,
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"rte_eth_rx_queue_setup: err=%d, "
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"port=%d, eth_qid: %d\n",
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ret, port_id, eth_qid);
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}
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/* init one Tx queue per port */
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txconf = dev_info.default_txconf;
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txconf.offloads = local_port_conf.txmode.offloads;
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ret = rte_eth_tx_queue_setup(port_id, 0, nb_txd, 0, &txconf);
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if (ret < 0)
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rte_exit(EXIT_FAILURE,
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"rte_eth_tx_queue_setup: err=%d, "
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"port=%d\n", ret, port_id);
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}
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}
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static void
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l3fwd_event_capability_setup(void)
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{
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struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
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uint32_t caps = 0;
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uint16_t i;
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int ret;
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RTE_ETH_FOREACH_DEV(i) {
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ret = rte_event_eth_tx_adapter_caps_get(0, i, &caps);
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if (ret)
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rte_exit(EXIT_FAILURE,
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"Invalid capability for Tx adptr port %d\n",
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i);
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evt_rsrc->tx_mode_q |= !(caps &
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RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT);
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}
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if (evt_rsrc->tx_mode_q)
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l3fwd_event_set_generic_ops(&evt_rsrc->ops);
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else
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l3fwd_event_set_internal_port_ops(&evt_rsrc->ops);
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}
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int
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l3fwd_get_free_event_port(struct l3fwd_event_resources *evt_rsrc)
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{
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static int index;
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int port_id;
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rte_spinlock_lock(&evt_rsrc->evp.lock);
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if (index >= evt_rsrc->evp.nb_ports) {
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printf("No free event port is available\n");
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return -1;
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}
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port_id = evt_rsrc->evp.event_p_id[index];
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index++;
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rte_spinlock_unlock(&evt_rsrc->evp.lock);
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return port_id;
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}
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void
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l3fwd_event_resource_setup(struct rte_eth_conf *port_conf)
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{
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struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
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const event_loop_cb lpm_event_loop[2][2] = {
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[0][0] = lpm_event_main_loop_tx_d,
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[0][1] = lpm_event_main_loop_tx_d_burst,
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[1][0] = lpm_event_main_loop_tx_q,
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[1][1] = lpm_event_main_loop_tx_q_burst,
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};
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const event_loop_cb em_event_loop[2][2] = {
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[0][0] = em_event_main_loop_tx_d,
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[0][1] = em_event_main_loop_tx_d_burst,
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[1][0] = em_event_main_loop_tx_q,
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[1][1] = em_event_main_loop_tx_q_burst,
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};
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uint32_t event_queue_cfg;
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int ret;
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if (!evt_rsrc->enabled)
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return;
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if (!rte_event_dev_count())
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rte_exit(EXIT_FAILURE, "No Eventdev found");
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/* Setup eventdev capability callbacks */
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l3fwd_event_capability_setup();
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/* Ethernet device configuration */
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l3fwd_eth_dev_port_setup(port_conf);
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/* Event device configuration */
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event_queue_cfg = evt_rsrc->ops.event_device_setup();
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/* Event queue configuration */
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evt_rsrc->ops.event_queue_setup(event_queue_cfg);
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/* Event port configuration */
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evt_rsrc->ops.event_port_setup();
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/* Rx/Tx adapters configuration */
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evt_rsrc->ops.adapter_setup();
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/* Start event device */
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ret = rte_event_dev_start(evt_rsrc->event_d_id);
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if (ret < 0)
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rte_exit(EXIT_FAILURE, "Error in starting eventdev");
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evt_rsrc->ops.lpm_event_loop = lpm_event_loop[evt_rsrc->tx_mode_q]
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[evt_rsrc->has_burst];
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evt_rsrc->ops.em_event_loop = em_event_loop[evt_rsrc->tx_mode_q]
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[evt_rsrc->has_burst];
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}
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