98d26ef7b8
Bump copyright year to 2021. Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
179 lines
4.4 KiB
C
179 lines
4.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright(c) 2019-2021 Xilinx, Inc.
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* Copyright(c) 2016-2019 Solarflare Communications Inc.
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*
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* This software was jointly developed between OKTET Labs (under contract
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* for Solarflare) and Solarflare Communications, Inc.
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*/
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#include <rte_ip.h>
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#include <rte_tcp.h>
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#include "sfc.h"
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#include "sfc_debug.h"
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#include "sfc_tx.h"
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#include "sfc_ev.h"
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#include "sfc_tso.h"
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int
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sfc_efx_tso_alloc_tsoh_objs(struct sfc_efx_tx_sw_desc *sw_ring,
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unsigned int txq_entries, unsigned int socket_id)
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{
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unsigned int i;
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for (i = 0; i < txq_entries; ++i) {
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sw_ring[i].tsoh = rte_malloc_socket("sfc-efx-txq-tsoh-obj",
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SFC_TSOH_STD_LEN,
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (sw_ring[i].tsoh == NULL)
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goto fail_alloc_tsoh_objs;
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}
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return 0;
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fail_alloc_tsoh_objs:
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while (i > 0)
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rte_free(sw_ring[--i].tsoh);
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return ENOMEM;
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}
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void
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sfc_efx_tso_free_tsoh_objs(struct sfc_efx_tx_sw_desc *sw_ring,
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unsigned int txq_entries)
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{
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unsigned int i;
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for (i = 0; i < txq_entries; ++i) {
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rte_free(sw_ring[i].tsoh);
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sw_ring[i].tsoh = NULL;
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}
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}
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unsigned int
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sfc_tso_prepare_header(uint8_t *tsoh, size_t header_len,
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struct rte_mbuf **in_seg, size_t *in_off)
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{
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struct rte_mbuf *m = *in_seg;
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size_t bytes_to_copy = 0;
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size_t bytes_left = header_len;
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unsigned int segments_copied = 0;
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do {
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bytes_to_copy = MIN(bytes_left, m->data_len);
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rte_memcpy(tsoh, rte_pktmbuf_mtod(m, uint8_t *),
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bytes_to_copy);
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bytes_left -= bytes_to_copy;
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tsoh += bytes_to_copy;
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if (bytes_left > 0) {
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m = m->next;
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SFC_ASSERT(m != NULL);
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segments_copied++;
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}
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} while (bytes_left > 0);
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if (bytes_to_copy == m->data_len) {
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*in_seg = m->next;
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*in_off = 0;
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segments_copied++;
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} else {
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*in_seg = m;
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*in_off = bytes_to_copy;
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}
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return segments_copied;
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}
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int
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sfc_efx_tso_do(struct sfc_efx_txq *txq, unsigned int idx,
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struct rte_mbuf **in_seg, size_t *in_off, efx_desc_t **pend,
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unsigned int *pkt_descs, size_t *pkt_len)
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{
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uint8_t *tsoh;
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const struct rte_tcp_hdr *th;
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efsys_dma_addr_t header_paddr;
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uint16_t packet_id = 0;
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uint32_t sent_seq;
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struct rte_mbuf *m = *in_seg;
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size_t nh_off = m->l2_len; /* IP header offset */
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size_t tcph_off = m->l2_len + m->l3_len; /* TCP header offset */
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size_t header_len = m->l2_len + m->l3_len + m->l4_len;
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idx += SFC_EF10_TSO_OPT_DESCS_NUM;
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header_paddr = rte_pktmbuf_iova(m);
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/*
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* Sometimes headers may be split across multiple mbufs. In such cases
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* we need to glue those pieces and store them in some temporary place.
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* Also, packet headers must be contiguous in memory, so that
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* they can be referred to with a single DMA descriptor. EF10 has no
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* limitations on address boundaries crossing by DMA descriptor data.
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*/
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if (m->data_len < header_len) {
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/*
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* Discard a packet if header linearization is needed but
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* the header is too big.
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* Duplicate Tx prepare check here to avoid spoil of
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* memory if Tx prepare is skipped.
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*/
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if (unlikely(header_len > SFC_TSOH_STD_LEN))
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return EMSGSIZE;
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tsoh = txq->sw_ring[idx & txq->ptr_mask].tsoh;
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sfc_tso_prepare_header(tsoh, header_len, in_seg, in_off);
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header_paddr = rte_malloc_virt2iova((void *)tsoh);
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} else {
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if (m->data_len == header_len) {
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*in_off = 0;
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*in_seg = m->next;
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} else {
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*in_off = header_len;
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}
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tsoh = rte_pktmbuf_mtod(m, uint8_t *);
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}
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/*
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* 8000-series EF10 hardware requires that innermost IP length
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* be greater than or equal to the value which each segment is
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* supposed to have; otherwise, TCP checksum will be incorrect.
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*/
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sfc_tso_innermost_ip_fix_len(m, tsoh, nh_off);
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/*
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* Handle IP header. Tx prepare has debug-only checks that offload flags
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* are correctly filled in in TSO mbuf. Use zero IPID if there is no
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* IPv4 flag. If the packet is still IPv4, HW will simply start from
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* zero IPID.
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*/
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if (m->ol_flags & PKT_TX_IPV4)
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packet_id = sfc_tso_ip4_get_ipid(tsoh, nh_off);
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/* Handle TCP header */
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th = (const struct rte_tcp_hdr *)(tsoh + tcph_off);
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rte_memcpy(&sent_seq, &th->sent_seq, sizeof(uint32_t));
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sent_seq = rte_be_to_cpu_32(sent_seq);
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efx_tx_qdesc_tso2_create(txq->common, packet_id, 0, sent_seq,
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m->tso_segsz,
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*pend, EFX_TX_FATSOV2_OPT_NDESCS);
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*pend += EFX_TX_FATSOV2_OPT_NDESCS;
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*pkt_descs += EFX_TX_FATSOV2_OPT_NDESCS;
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efx_tx_qdesc_dma_create(txq->common, header_paddr, header_len,
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B_FALSE, (*pend)++);
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(*pkt_descs)++;
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*pkt_len -= header_len;
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return 0;
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}
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