381 lines
11 KiB
C
381 lines
11 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <sys/queue.h>
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#include <cmdline_parse.h>
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#include <rte_memory.h>
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#include <rte_memzone.h>
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#include <rte_per_lcore.h>
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#include <rte_launch.h>
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#include <rte_atomic.h>
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#include <rte_tailq.h>
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#include <rte_eal.h>
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#include <rte_per_lcore.h>
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#include <rte_lcore.h>
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#include "test.h"
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/*
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* Atomic Variables
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* ================
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*
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* - The main test function performs three subtests. The first test
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* checks that the usual inc/dec/add/sub functions are working
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* correctly:
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*
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* - Initialize 16-bit, 32-bit and 64-bit atomic variables to specific
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* values.
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*
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* - These variables are incremented and decremented on each core at
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* the same time in ``test_atomic_usual()``.
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*
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* - The function checks that once all lcores finish their function,
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* the value of the atomic variables are still the same.
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*
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* - The second test verifies the behavior of "test and set" functions.
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*
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* - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
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*
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* - Invoke ``test_atomic_tas()`` on each lcore: before doing anything
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* else. The cores are waiting a synchro using ``while
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* (rte_atomic32_read(&val) == 0)`` which is triggered by the main test
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* function. Then all cores do a
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* ``rte_atomicXX_test_and_set()`` at the same time. If it is successful,
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* it increments another atomic counter.
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*
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* - The main function checks that the atomic counter was incremented
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* twice only (one for 16-bit, one for 32-bit and one for 64-bit values).
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*
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* - Test "add/sub and return"
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*
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* - Initialize 16-bit, 32-bit and 64-bit atomic variables to zero.
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*
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* - Invoke ``test_atomic_addsub_return()`` on each lcore. Before doing
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* anything else, the cores are waiting a synchro. Each lcore does
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* this operation several times::
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*
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* tmp = rte_atomicXX_add_return(&a, 1);
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* atomic_add(&count, tmp);
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* tmp = rte_atomicXX_sub_return(&a, 1);
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* atomic_sub(&count, tmp+1);
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*
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* - At the end of the test, the *count* value must be 0.
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*/
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#define NUM_ATOMIC_TYPES 3
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#define N 10000
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static rte_atomic16_t a16;
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static rte_atomic32_t a32;
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static rte_atomic64_t a64;
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static rte_atomic64_t count;
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static rte_atomic32_t synchro;
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static int
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test_atomic_usual(__attribute__((unused)) void *arg)
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{
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unsigned i;
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while (rte_atomic32_read(&synchro) == 0)
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;
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for (i = 0; i < N; i++)
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rte_atomic16_inc(&a16);
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for (i = 0; i < N; i++)
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rte_atomic16_dec(&a16);
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for (i = 0; i < (N / 5); i++)
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rte_atomic16_add(&a16, 5);
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for (i = 0; i < (N / 5); i++)
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rte_atomic16_sub(&a16, 5);
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for (i = 0; i < N; i++)
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rte_atomic32_inc(&a32);
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for (i = 0; i < N; i++)
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rte_atomic32_dec(&a32);
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for (i = 0; i < (N / 5); i++)
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rte_atomic32_add(&a32, 5);
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for (i = 0; i < (N / 5); i++)
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rte_atomic32_sub(&a32, 5);
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for (i = 0; i < N; i++)
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rte_atomic64_inc(&a64);
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for (i = 0; i < N; i++)
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rte_atomic64_dec(&a64);
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for (i = 0; i < (N / 5); i++)
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rte_atomic64_add(&a64, 5);
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for (i = 0; i < (N / 5); i++)
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rte_atomic64_sub(&a64, 5);
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return 0;
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}
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static int
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test_atomic_tas(__attribute__((unused)) void *arg)
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{
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while (rte_atomic32_read(&synchro) == 0)
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;
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if (rte_atomic16_test_and_set(&a16))
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rte_atomic64_inc(&count);
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if (rte_atomic32_test_and_set(&a32))
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rte_atomic64_inc(&count);
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if (rte_atomic64_test_and_set(&a64))
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rte_atomic64_inc(&count);
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return 0;
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}
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static int
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test_atomic_addsub_and_return(__attribute__((unused)) void *arg)
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{
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uint32_t tmp16;
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uint32_t tmp32;
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uint64_t tmp64;
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unsigned i;
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while (rte_atomic32_read(&synchro) == 0)
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;
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for (i = 0; i < N; i++) {
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tmp16 = rte_atomic16_add_return(&a16, 1);
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rte_atomic64_add(&count, tmp16);
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tmp16 = rte_atomic16_sub_return(&a16, 1);
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rte_atomic64_sub(&count, tmp16+1);
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tmp32 = rte_atomic32_add_return(&a32, 1);
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rte_atomic64_add(&count, tmp32);
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tmp32 = rte_atomic32_sub_return(&a32, 1);
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rte_atomic64_sub(&count, tmp32+1);
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tmp64 = rte_atomic64_add_return(&a64, 1);
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rte_atomic64_add(&count, tmp64);
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tmp64 = rte_atomic64_sub_return(&a64, 1);
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rte_atomic64_sub(&count, tmp64+1);
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}
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return 0;
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}
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/*
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* rte_atomic32_inc_and_test() would increase a 32 bits counter by one and then
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* test if that counter is equal to 0. It would return true if the counter is 0
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* and false if the counter is not 0. rte_atomic64_inc_and_test() could do the
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* same thing but for a 64 bits counter.
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* Here checks that if the 32/64 bits counter is equal to 0 after being atomically
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* increased by one. If it is, increase the variable of "count" by one which would
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* be checked as the result later.
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*
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*/
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static int
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test_atomic_inc_and_test(__attribute__((unused)) void *arg)
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{
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while (rte_atomic32_read(&synchro) == 0)
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;
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if (rte_atomic16_inc_and_test(&a16)) {
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rte_atomic64_inc(&count);
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}
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if (rte_atomic32_inc_and_test(&a32)) {
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rte_atomic64_inc(&count);
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}
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if (rte_atomic64_inc_and_test(&a64)) {
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rte_atomic64_inc(&count);
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}
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return 0;
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}
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/*
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* rte_atomicXX_dec_and_test() should decrease a 32 bits counter by one and then
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* test if that counter is equal to 0. It should return true if the counter is 0
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* and false if the counter is not 0.
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* This test checks if the counter is equal to 0 after being atomically
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* decreased by one. If it is, increase the value of "count" by one which is to
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* be checked as the result later.
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*/
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static int
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test_atomic_dec_and_test(__attribute__((unused)) void *arg)
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{
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while (rte_atomic32_read(&synchro) == 0)
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;
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if (rte_atomic16_dec_and_test(&a16))
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rte_atomic64_inc(&count);
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if (rte_atomic32_dec_and_test(&a32))
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rte_atomic64_inc(&count);
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if (rte_atomic64_dec_and_test(&a64))
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rte_atomic64_inc(&count);
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return 0;
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}
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int
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test_atomic(void)
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{
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rte_atomic16_init(&a16);
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rte_atomic32_init(&a32);
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rte_atomic64_init(&a64);
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rte_atomic64_init(&count);
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rte_atomic32_init(&synchro);
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rte_atomic16_set(&a16, 1UL << 10);
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rte_atomic32_set(&a32, 1UL << 10);
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rte_atomic64_set(&a64, 1ULL << 33);
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printf("usual inc/dec/add/sub functions\n");
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rte_eal_mp_remote_launch(test_atomic_usual, NULL, SKIP_MASTER);
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rte_atomic32_set(&synchro, 1);
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rte_eal_mp_wait_lcore();
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rte_atomic32_set(&synchro, 0);
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if (rte_atomic16_read(&a16) != 1UL << 10) {
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printf("Atomic16 usual functions failed\n");
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return -1;
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}
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if (rte_atomic32_read(&a32) != 1UL << 10) {
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printf("Atomic32 usual functions failed\n");
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return -1;
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}
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if (rte_atomic64_read(&a64) != 1ULL << 33) {
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printf("Atomic64 usual functions failed\n");
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return -1;
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}
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printf("test and set\n");
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rte_atomic64_set(&a64, 0);
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rte_atomic32_set(&a32, 0);
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rte_atomic16_set(&a16, 0);
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rte_atomic64_set(&count, 0);
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rte_eal_mp_remote_launch(test_atomic_tas, NULL, SKIP_MASTER);
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rte_atomic32_set(&synchro, 1);
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rte_eal_mp_wait_lcore();
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rte_atomic32_set(&synchro, 0);
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if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
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printf("Atomic test and set failed\n");
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return -1;
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}
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printf("add/sub and return\n");
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rte_atomic64_set(&a64, 0);
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rte_atomic32_set(&a32, 0);
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rte_atomic16_set(&a16, 0);
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rte_atomic64_set(&count, 0);
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rte_eal_mp_remote_launch(test_atomic_addsub_and_return, NULL,
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SKIP_MASTER);
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rte_atomic32_set(&synchro, 1);
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rte_eal_mp_wait_lcore();
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rte_atomic32_set(&synchro, 0);
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if (rte_atomic64_read(&count) != 0) {
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printf("Atomic add/sub+return failed\n");
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return -1;
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}
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/*
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* Set a64, a32 and a16 with the same value of minus "number of slave
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* lcores", launch all slave lcores to atomically increase by one and
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* test them respectively.
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* Each lcore should have only one chance to increase a64 by one and
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* then check if it is equal to 0, but there should be only one lcore
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* that finds that it is 0. It is similar for a32 and a16.
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* Then a variable of "count", initialized to zero, is increased by
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* one if a64, a32 or a16 is 0 after being increased and tested
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* atomically.
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* We can check if "count" is finally equal to 3 to see if all slave
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* lcores performed "atomic inc and test" right.
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*/
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printf("inc and test\n");
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rte_atomic64_clear(&a64);
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rte_atomic32_clear(&a32);
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rte_atomic16_clear(&a16);
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rte_atomic32_clear(&synchro);
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rte_atomic64_clear(&count);
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rte_atomic64_set(&a64, (int64_t)(1 - (int64_t)rte_lcore_count()));
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rte_atomic32_set(&a32, (int32_t)(1 - (int32_t)rte_lcore_count()));
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rte_atomic16_set(&a16, (int16_t)(1 - (int16_t)rte_lcore_count()));
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rte_eal_mp_remote_launch(test_atomic_inc_and_test, NULL, SKIP_MASTER);
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rte_atomic32_set(&synchro, 1);
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rte_eal_mp_wait_lcore();
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rte_atomic32_clear(&synchro);
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if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
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printf("Atomic inc and test failed %d\n", (int)count.cnt);
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return -1;
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}
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/*
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* Same as above, but this time we set the values to "number of slave
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* lcores", and decrement instead of increment.
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*/
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printf("dec and test\n");
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rte_atomic32_clear(&synchro);
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rte_atomic64_clear(&count);
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rte_atomic64_set(&a64, (int64_t)(rte_lcore_count() - 1));
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rte_atomic32_set(&a32, (int32_t)(rte_lcore_count() - 1));
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rte_atomic16_set(&a16, (int16_t)(rte_lcore_count() - 1));
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rte_eal_mp_remote_launch(test_atomic_dec_and_test, NULL, SKIP_MASTER);
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rte_atomic32_set(&synchro, 1);
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rte_eal_mp_wait_lcore();
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rte_atomic32_clear(&synchro);
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if (rte_atomic64_read(&count) != NUM_ATOMIC_TYPES) {
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printf("Atomic dec and test failed\n");
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return -1;
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}
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return 0;
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}
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