Michael Baum a2521c8f98 common/mlx5: fix completion queue entry size configuration ... According to the current data-path implementation in the PMD the CQE size must follow the cache-line size. So, the configuration of the CQE size should be depended in RTE_CACHE_LINE_SIZE. Wrongly, part of the CQE creations didn't follow it exactly what caused an incompatibility between HW and SW in the data-path when working in 128B cache-line size systems. Adjust the rule for any CQE creation. Remove the cqe_size attribute from the DevX CQ creation command and set it inside the command translation according to the cache-line size. Fixes: 79a7e409a2 ("common/mlx5: prepare support of packet pacing") Fixes: 5cd0a83f41 ("common/mlx5: support more fields in DevX CQ create") Cc: stable@dpdk.org Signed-off-by: Michael Baum <michaelba@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>		2021-01-14 10:12:36 +01:00
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cpt	common/cpt: remove redundant structure	2020-11-12 21:47:42 +01:00
dpaax	build: align wording of non-support reasons	2020-11-20 16:05:35 +01:00
iavf	common/iavf: update copyright date	2021-01-13 18:51:58 +01:00
mlx5	common/mlx5: fix completion queue entry size configuration	2021-01-14 10:12:36 +01:00
mvep	build: update meson for Marvell Armada drivers	2021-01-08 16:03:05 +01:00
octeontx	build: remove library name from version map file name	2020-10-19 22:13:59 +02:00
octeontx2	net/octeontx2: support 24B custom L2 header parsing	2021-01-13 19:39:08 +01:00
qat	common/qat: add missing kmod dependency info	2020-11-02 09:24:41 +01:00
sfc_efx	common/sfc_efx/base: check for MAE privilege	2021-01-08 16:03:05 +01:00
meson.build	build: standardize component names and defines	2020-10-19 22:15:34 +02:00