de5eb0a604
Added support for DIGEST_ENCRYPTED mode for octeontx and octeontx2 platforms. Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
446 lines
9.5 KiB
C
446 lines
9.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Cavium, Inc
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*/
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#ifndef _CPT_MCODE_DEFINES_H_
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#define _CPT_MCODE_DEFINES_H_
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#include <rte_byteorder.h>
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#include <rte_crypto_asym.h>
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#include <rte_memory.h>
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/*
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* This file defines macros and structures according to microcode spec
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*
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*/
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/* SE opcodes */
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#define CPT_MAJOR_OP_FC 0x33
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#define CPT_MAJOR_OP_HASH 0x34
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#define CPT_MAJOR_OP_HMAC 0x35
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#define CPT_MAJOR_OP_ZUC_SNOW3G 0x37
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#define CPT_MAJOR_OP_KASUMI 0x38
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#define CPT_MAJOR_OP_MISC 0x01
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#define CPT_HMAC_FIRST_BIT_POS 0x4
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#define CPT_FC_MINOR_OP_ENCRYPT 0x0
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#define CPT_FC_MINOR_OP_DECRYPT 0x1
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/* AE opcodes */
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#define CPT_MAJOR_OP_MODEX 0x03
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#define CPT_MAJOR_OP_ECDSA 0x04
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#define CPT_MAJOR_OP_ECC 0x05
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#define CPT_MINOR_OP_MODEX 0x01
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#define CPT_MINOR_OP_PKCS_ENC 0x02
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#define CPT_MINOR_OP_PKCS_ENC_CRT 0x03
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#define CPT_MINOR_OP_PKCS_DEC 0x04
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#define CPT_MINOR_OP_PKCS_DEC_CRT 0x05
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#define CPT_MINOR_OP_MODEX_CRT 0x06
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#define CPT_MINOR_OP_ECDSA_SIGN 0x01
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#define CPT_MINOR_OP_ECDSA_VERIFY 0x02
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#define CPT_MINOR_OP_ECC_UMP 0x03
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#define CPT_BLOCK_TYPE1 0
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#define CPT_BLOCK_TYPE2 1
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#define CPT_MAX_SG_IN_OUT_CNT 32
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#define CPT_MAX_SG_CNT (CPT_MAX_SG_IN_OUT_CNT/2)
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#define COMPLETION_CODE_SIZE 8
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#define COMPLETION_CODE_INIT 0
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#define SG_LIST_HDR_SIZE (8u)
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#define SG_ENTRY_SIZE sizeof(sg_comp_t)
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#define CPT_DMA_MODE (1 << 7)
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#define CPT_FROM_CTX 0
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#define CPT_FROM_DPTR 1
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#define FC_GEN 0x1
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#define ZUC_SNOW3G 0x2
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#define KASUMI 0x3
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#define HASH_HMAC 0x4
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#define ZS_EA 0x1
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#define ZS_IA 0x2
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#define K_F8 0x4
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#define K_F9 0x8
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#define CPT_OP_CIPHER_ENCRYPT 0x1
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#define CPT_OP_CIPHER_DECRYPT 0x2
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#define CPT_OP_CIPHER_MASK 0x3
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#define CPT_OP_AUTH_VERIFY 0x4
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#define CPT_OP_AUTH_GENERATE 0x8
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#define CPT_OP_AUTH_MASK 0xC
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#define CPT_OP_ENCODE (CPT_OP_CIPHER_ENCRYPT | CPT_OP_AUTH_GENERATE)
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#define CPT_OP_DECODE (CPT_OP_CIPHER_DECRYPT | CPT_OP_AUTH_VERIFY)
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/* #define CPT_ALWAYS_USE_SG_MODE */
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#define CPT_ALWAYS_USE_SEPARATE_BUF
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/*
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* Parameters for Flexi Crypto
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* requests
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*/
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#define VALID_AAD_BUF 0x01
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#define VALID_MAC_BUF 0x02
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#define VALID_IV_BUF 0x04
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#define SINGLE_BUF_INPLACE 0x08
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#define SINGLE_BUF_HEADTAILROOM 0x10
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#define ENCR_IV_OFFSET(__d_offs) ((__d_offs >> 32) & 0xffff)
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#define ENCR_OFFSET(__d_offs) ((__d_offs >> 16) & 0xffff)
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#define AUTH_OFFSET(__d_offs) (__d_offs & 0xffff)
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#define ENCR_DLEN(__d_lens) (__d_lens >> 32)
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#define AUTH_DLEN(__d_lens) (__d_lens & 0xffffffff)
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/* FC offset_control at start of DPTR in bytes */
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#define OFF_CTRL_LEN 8 /**< bytes */
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typedef enum {
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MD5_TYPE = 1,
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SHA1_TYPE = 2,
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SHA2_SHA224 = 3,
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SHA2_SHA256 = 4,
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SHA2_SHA384 = 5,
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SHA2_SHA512 = 6,
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GMAC_TYPE = 7,
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POLY1305 = 8,
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SHA3_SHA224 = 10,
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SHA3_SHA256 = 11,
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SHA3_SHA384 = 12,
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SHA3_SHA512 = 13,
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SHA3_SHAKE256 = 14,
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SHA3_SHAKE512 = 15,
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/* These are only for software use */
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ZUC_EIA3 = 0x90,
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SNOW3G_UIA2 = 0x91,
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KASUMI_F9_CBC = 0x92,
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KASUMI_F9_ECB = 0x93,
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} mc_hash_type_t;
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typedef enum {
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/* To support passthrough */
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PASSTHROUGH = 0x0,
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/*
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* These are defined by MC for Flexi crypto
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* for field of 4 bits
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*/
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DES3_CBC = 0x1,
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DES3_ECB = 0x2,
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AES_CBC = 0x3,
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AES_ECB = 0x4,
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AES_CFB = 0x5,
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AES_CTR = 0x6,
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AES_GCM = 0x7,
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AES_XTS = 0x8,
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CHACHA20 = 0x9,
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/* These are only for software use */
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ZUC_EEA3 = 0x90,
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SNOW3G_UEA2 = 0x91,
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KASUMI_F8_CBC = 0x92,
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KASUMI_F8_ECB = 0x93,
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} mc_cipher_type_t;
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typedef enum {
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AES_128_BIT = 0x1,
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AES_192_BIT = 0x2,
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AES_256_BIT = 0x3
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} mc_aes_type_t;
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typedef enum {
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/* Microcode errors */
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NO_ERR = 0x00,
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ERR_OPCODE_UNSUPPORTED = 0x01,
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/* SCATTER GATHER */
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ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02,
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ERR_SCATTER_GATHER_LIST = 0x03,
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ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04,
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/* SE GC */
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ERR_GC_LENGTH_INVALID = 0x41,
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ERR_GC_RANDOM_LEN_INVALID = 0x42,
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ERR_GC_DATA_LEN_INVALID = 0x43,
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ERR_GC_DRBG_TYPE_INVALID = 0x44,
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ERR_GC_CTX_LEN_INVALID = 0x45,
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ERR_GC_CIPHER_UNSUPPORTED = 0x46,
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ERR_GC_AUTH_UNSUPPORTED = 0x47,
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ERR_GC_OFFSET_INVALID = 0x48,
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ERR_GC_HASH_MODE_UNSUPPORTED = 0x49,
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ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a,
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ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b,
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ERR_GC_ICV_MISCOMPARE = 0x4c,
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ERR_GC_DATA_UNALIGNED = 0x4d,
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/* API Layer */
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ERR_BAD_ALT_CCODE = 0xfd,
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ERR_REQ_PENDING = 0xfe,
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ERR_REQ_TIMEOUT = 0xff,
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ERR_BAD_INPUT_LENGTH = (0x40000000 | 384), /* 0x40000180 */
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ERR_BAD_KEY_LENGTH,
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ERR_BAD_KEY_HANDLE,
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ERR_BAD_CONTEXT_HANDLE,
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ERR_BAD_SCALAR_LENGTH,
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ERR_BAD_DIGEST_LENGTH,
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ERR_BAD_INPUT_ARG,
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ERR_BAD_RECORD_PADDING,
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ERR_NB_REQUEST_PENDING,
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ERR_EIO,
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ERR_ENODEV,
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} mc_error_code_t;
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/**
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* Enumeration cpt_comp_e
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*
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* CPT Completion Enumeration
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* Enumerates the values of CPT_RES_S[COMPCODE].
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*/
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typedef enum {
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CPT_8X_COMP_E_NOTDONE = (0x00),
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CPT_8X_COMP_E_GOOD = (0x01),
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CPT_8X_COMP_E_FAULT = (0x02),
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CPT_8X_COMP_E_SWERR = (0x03),
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CPT_8X_COMP_E_HWERR = (0x04),
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CPT_8X_COMP_E_LAST_ENTRY = (0xFF)
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} cpt_comp_e_t;
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/**
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* Enumeration cpt_ec_id
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*
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* Enumerates supported elliptic curves
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*/
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typedef enum {
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CPT_EC_ID_P192 = 0,
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CPT_EC_ID_P224 = 1,
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CPT_EC_ID_P256 = 2,
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CPT_EC_ID_P384 = 3,
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CPT_EC_ID_P521 = 4,
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CPT_EC_ID_PMAX = 5
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} cpt_ec_id_t;
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typedef struct sglist_comp {
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union {
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uint64_t len;
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struct {
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uint16_t len[4];
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} s;
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} u;
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uint64_t ptr[4];
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} sg_comp_t;
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struct cpt_sess_misc {
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/** CPT opcode */
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uint16_t cpt_op:4;
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/** ZUC, SNOW3G & KASUMI flags */
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uint16_t zsk_flag:4;
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/** Flag for AES GCM */
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uint16_t aes_gcm:1;
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/** Flag for AES CTR */
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uint16_t aes_ctr:1;
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/** Flag for CHACHA POLY */
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uint16_t chacha_poly:1;
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/** Flag for NULL cipher/auth */
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uint16_t is_null:1;
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/** Flag for GMAC */
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uint16_t is_gmac:1;
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/** Unused field */
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uint16_t rsvd1:3;
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/** AAD length */
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uint16_t aad_length;
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/** MAC len in bytes */
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uint8_t mac_len;
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/** IV length in bytes */
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uint8_t iv_length;
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/** Auth IV length in bytes */
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uint8_t auth_iv_length;
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/** Unused field */
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uint8_t rsvd2;
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/** IV offset in bytes */
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uint16_t iv_offset;
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/** Auth IV offset in bytes */
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uint16_t auth_iv_offset;
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/** Salt */
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uint32_t salt;
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/** CPT inst word 7 */
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uint64_t cpt_inst_w7;
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/** Context DMA address */
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phys_addr_t ctx_dma_addr;
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};
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typedef struct {
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uint64_t iv_source : 1;
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uint64_t aes_key : 2;
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uint64_t rsvd_60 : 1;
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uint64_t enc_cipher : 4;
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uint64_t auth_input_type : 1;
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uint64_t rsvd_52_54 : 3;
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uint64_t hash_type : 4;
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uint64_t mac_len : 8;
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uint64_t rsvd_39_0 : 40;
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uint8_t encr_key[32];
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uint8_t encr_iv[16];
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} mc_enc_context_t;
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typedef struct {
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uint8_t ipad[64];
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uint8_t opad[64];
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} mc_fc_hmac_context_t;
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typedef struct {
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mc_enc_context_t enc;
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mc_fc_hmac_context_t hmac;
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} mc_fc_context_t;
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typedef struct {
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uint8_t encr_auth_iv[16];
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uint8_t ci_key[16];
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uint8_t zuc_const[32];
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} mc_zuc_snow3g_ctx_t;
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typedef struct {
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uint8_t reg_A[8];
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uint8_t ci_key[16];
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} mc_kasumi_ctx_t;
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struct cpt_ctx {
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/* Below fields are accessed by sw */
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uint64_t enc_cipher :8;
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uint64_t hash_type :8;
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uint64_t mac_len :8;
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uint64_t auth_key_len :8;
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uint64_t fc_type :4;
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uint64_t hmac :1;
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uint64_t zsk_flags :3;
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uint64_t k_ecb :1;
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uint64_t auth_enc :1;
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uint64_t dec_auth :1;
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uint64_t snow3g :2;
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uint64_t rsvd :19;
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/* Below fields are accessed by hardware */
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union {
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mc_fc_context_t fctx;
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mc_zuc_snow3g_ctx_t zs_ctx;
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mc_kasumi_ctx_t k_ctx;
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} mc_ctx;
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uint8_t auth_key[1024];
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};
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/* Prime and order fields of built-in elliptic curves */
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struct cpt_ec_group {
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struct {
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/* P521 maximum length */
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uint8_t data[66];
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unsigned int length;
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} prime;
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struct {
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/* P521 maximum length */
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uint8_t data[66];
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unsigned int length;
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} order;
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};
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struct cpt_asym_ec_ctx {
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/* Prime length defined by microcode for EC operations */
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uint8_t curveid;
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};
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struct cpt_asym_sess_misc {
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enum rte_crypto_asym_xform_type xfrm_type;
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union {
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struct rte_crypto_rsa_xform rsa_ctx;
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struct rte_crypto_modex_xform mod_ctx;
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struct cpt_asym_ec_ctx ec_ctx;
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};
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uint64_t cpt_inst_w7;
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};
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/* Buffer pointer */
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typedef struct buf_ptr {
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void *vaddr;
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phys_addr_t dma_addr;
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uint32_t size;
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uint32_t resv;
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} buf_ptr_t;
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/* IOV Pointer */
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typedef struct{
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int buf_cnt;
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buf_ptr_t bufs[0];
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} iov_ptr_t;
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typedef struct fc_params {
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/* 0th cache line */
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union {
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buf_ptr_t bufs[1];
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struct {
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iov_ptr_t *src_iov;
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iov_ptr_t *dst_iov;
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};
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};
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void *iv_buf;
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void *auth_iv_buf;
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buf_ptr_t meta_buf;
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buf_ptr_t ctx_buf;
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uint64_t rsvd2;
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/* 1st cache line */
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buf_ptr_t aad_buf;
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buf_ptr_t mac_buf;
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} fc_params_t;
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/*
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* Parameters for asymmetric operations
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*/
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struct asym_op_params {
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struct cpt_request_info *req;
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phys_addr_t meta_buf;
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};
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/*
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* Parameters for digest
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* generate requests
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* Only src_iov, op, ctx_buf, mac_buf, prep_req
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* meta_buf, auth_data_len are used for digest gen.
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*/
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typedef struct fc_params digest_params_t;
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/* Cipher Algorithms */
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typedef mc_cipher_type_t cipher_type_t;
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/* Auth Algorithms */
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typedef mc_hash_type_t auth_type_t;
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/* Helper macros */
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#define SRC_IOV_SIZE \
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(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
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#define DST_IOV_SIZE \
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(sizeof(iov_ptr_t) + (sizeof(buf_ptr_t) * CPT_MAX_SG_CNT))
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#define SESS_PRIV(__sess) \
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(void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
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#define GET_SESS_FC_TYPE(__sess) \
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(((struct cpt_ctx *)(SESS_PRIV(__sess)))->fc_type)
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/*
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* Get the session size
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*
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* @return
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* - session size
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*/
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static __rte_always_inline unsigned int
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cpt_get_session_size(void)
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{
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unsigned int ctx_len = sizeof(struct cpt_ctx);
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return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8));
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}
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#endif /* _CPT_MCODE_DEFINES_H_ */
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