a65126d1ad
Enable GTPU pattern for CVL switch filter. Support teid and qfi field of GTPU pattern. Patterns without inner l3/l4 field support outer dst/src ip. Patterns with inner l3/l4 field only support inner dst/src ip and inner dst/src port. +----------------------------------+------------------------------------+ | Pattern | Input Set | +----------------------------------+------------------------------------+ | pattern_eth_ipv4_gtpu | teid, dst/src ip | | pattern_eth_ipv6_gtpu | teid, dst/src ip | | pattern_eth_ipv4_gtpu_ipv4 | teid, dst/src ip | | pattern_eth_ipv4_gtpu_ipv4_tcp | teid, dst/src ip, dst/src port | | pattern_eth_ipv4_gtpu_ipv4_udp | teid, dst/src ip, dst/src port | | pattern_eth_ipv4_gtpu_ipv6 | teid, dst/src ip | | pattern_eth_ipv4_gtpu_ipv6_tcp | teid, dst/src ip, dst/src port | | pattern_eth_ipv4_gtpu_ipv6_udp | teid, dst/src ip, dst/src port | | pattern_eth_ipv6_gtpu_ipv4 | teid, dst/src ip | | pattern_eth_ipv6_gtpu_ipv4_tcp | teid, dst/src ip, dst/src port | | pattern_eth_ipv6_gtpu_ipv4_udp | teid, dst/src ip, dst/src port | | pattern_eth_ipv6_gtpu_ipv6 | teid, dst/src ip | | pattern_eth_ipv6_gtpu_ipv6_tcp | teid, dst/src ip, dst/src port | | pattern_eth_ipv6_gtpu_ipv6_udp | teid, dst/src ip, dst/src port | | pattern_eth_ipv4_gtpu_eh_ipv4 | teid, qfi, dst/src ip | | pattern_eth_ipv4_gtpu_eh_ipv4_tcp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv4_gtpu_eh_ipv4_udp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv4_gtpu_eh_ipv6 | teid, qfi, dst/src ip | | pattern_eth_ipv4_gtpu_eh_ipv6_tcp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv4_gtpu_eh_ipv6_udp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv6_gtpu_eh_ipv4 | teid, qfi, dst/src ip | | pattern_eth_ipv6_gtpu_eh_ipv4_tcp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv6_gtpu_eh_ipv4_udp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv6_gtpu_eh_ipv6 | teid, qfi, dst/src ip | | pattern_eth_ipv6_gtpu_eh_ipv6_tcp| teid, qfi, dst/src ip, dst/src port| | pattern_eth_ipv6_gtpu_eh_ipv6_udp| teid, qfi, dst/src ip, dst/src port| +----------------------------------+------------------------------------+ Signed-off-by: Yuying Zhang <yuying.zhang@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>