9ffe2a15a9
Based on number of VFs enabled at PCI, PF-PMD driver instance enables/configures those VFs from hardware perspective, such that in later patches they could get required HW access to communicate with PFs for slowpath configuration and run the fastpath themselves. This patch also add two new qede IOV files [qede_sriov(.c|.h)] under qede directory to add non-base driver IOV APIs/contents there. Signed-off-by: Manish Chopra <manishc@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Rasesh Mody <rmody@marvell.com>
245 lines
6.4 KiB
C
245 lines
6.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2016 - 2018 Cavium Inc.
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* All rights reserved.
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* www.cavium.com
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*/
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#ifndef _QEDE_IF_H
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#define _QEDE_IF_H
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#include "qede_ethdev.h"
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/* forward */
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struct ecore_dev;
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struct qed_sb_info;
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struct qed_pf_params;
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enum ecore_int_mode;
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struct qed_dev_info {
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uint8_t num_hwfns;
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uint8_t hw_mac[RTE_ETHER_ADDR_LEN];
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bool is_mf_default;
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/* FW version */
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uint16_t fw_major;
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uint16_t fw_minor;
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uint16_t fw_rev;
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uint16_t fw_eng;
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/* MFW version */
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uint32_t mfw_rev;
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#define QED_MFW_VERSION_0_MASK 0x000000FF
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#define QED_MFW_VERSION_0_OFFSET 0
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#define QED_MFW_VERSION_1_MASK 0x0000FF00
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#define QED_MFW_VERSION_1_OFFSET 8
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#define QED_MFW_VERSION_2_MASK 0x00FF0000
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#define QED_MFW_VERSION_2_OFFSET 16
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#define QED_MFW_VERSION_3_MASK 0xFF000000
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#define QED_MFW_VERSION_3_OFFSET 24
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uint32_t flash_size;
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bool b_arfs_capable;
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bool b_inter_pf_switch;
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bool tx_switching;
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u16 mtu;
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bool smart_an;
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/* MBI version */
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uint32_t mbi_version;
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#define QED_MBI_VERSION_0_MASK 0x000000FF
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#define QED_MBI_VERSION_0_OFFSET 0
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#define QED_MBI_VERSION_1_MASK 0x0000FF00
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#define QED_MBI_VERSION_1_OFFSET 8
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#define QED_MBI_VERSION_2_MASK 0x00FF0000
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#define QED_MBI_VERSION_2_OFFSET 16
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/* Out param for qede */
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bool vxlan_enable;
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bool gre_enable;
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bool geneve_enable;
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enum ecore_dev_type dev_type;
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};
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struct qed_dev_eth_info {
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struct qed_dev_info common;
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uint8_t num_queues;
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uint8_t num_tc;
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struct rte_ether_addr port_mac;
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uint16_t num_vlan_filters;
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uint32_t num_mac_filters;
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/* Legacy VF - this affects the datapath */
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bool is_legacy;
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};
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#define INIT_STRUCT_FIELD(field, value) .field = value
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struct qed_eth_ops {
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const struct qed_common_ops *common;
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int (*fill_dev_info)(struct ecore_dev *edev,
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struct qed_dev_eth_info *info);
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void (*sriov_configure)(struct ecore_dev *edev, int num_vfs);
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};
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struct qed_link_params {
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bool link_up;
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#define QED_LINK_OVERRIDE_SPEED_AUTONEG (1 << 0)
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#define QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS (1 << 1)
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#define QED_LINK_OVERRIDE_SPEED_FORCED_SPEED (1 << 2)
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#define QED_LINK_OVERRIDE_PAUSE_CONFIG (1 << 3)
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#define QED_LINK_OVERRIDE_EEE_CONFIG (1 << 5)
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uint32_t override_flags;
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bool autoneg;
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uint32_t adv_speeds;
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uint32_t forced_speed;
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#define QED_LINK_PAUSE_AUTONEG_ENABLE (1 << 0)
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#define QED_LINK_PAUSE_RX_ENABLE (1 << 1)
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#define QED_LINK_PAUSE_TX_ENABLE (1 << 2)
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uint32_t pause_config;
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struct ecore_link_eee_params eee;
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};
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struct qed_link_output {
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bool link_up;
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uint32_t supported_caps; /* In SUPPORTED defs */
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uint32_t advertised_caps; /* In ADVERTISED defs */
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uint32_t lp_caps; /* In ADVERTISED defs */
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uint32_t speed; /* In Mb/s */
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uint32_t adv_speed; /* Speed mask */
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uint8_t duplex; /* In DUPLEX defs */
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uint16_t port; /* In PORT defs */
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bool autoneg;
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uint32_t pause_config;
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/* EEE - capability & param */
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bool eee_supported;
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bool eee_active;
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u8 sup_caps;
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struct ecore_link_eee_params eee;
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};
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struct qed_slowpath_params {
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uint32_t int_mode;
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uint8_t drv_major;
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uint8_t drv_minor;
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uint8_t drv_rev;
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uint8_t drv_eng;
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uint8_t name[NAME_SIZE];
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};
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struct qed_common_cb_ops {
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void (*link_update)(void *dev, struct qed_link_output *link);
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};
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struct qed_common_ops {
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int (*probe)(struct ecore_dev *edev,
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struct rte_pci_device *pci_dev,
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uint32_t dp_module, uint8_t dp_level, bool is_vf);
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void (*set_name)(struct ecore_dev *edev, char name[]);
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enum _ecore_status_t
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(*chain_alloc)(struct ecore_dev *edev,
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enum ecore_chain_use_mode
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intended_use,
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enum ecore_chain_mode mode,
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enum ecore_chain_cnt_type cnt_type,
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uint32_t num_elems,
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osal_size_t elem_size,
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struct ecore_chain *p_chain,
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struct ecore_chain_ext_pbl *ext_pbl);
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void (*chain_free)(struct ecore_dev *edev,
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struct ecore_chain *p_chain);
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void (*get_link)(struct ecore_dev *edev,
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struct qed_link_output *if_link);
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int (*set_link)(struct ecore_dev *edev,
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struct qed_link_params *params);
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int (*drain)(struct ecore_dev *edev);
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void (*remove)(struct ecore_dev *edev);
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int (*slowpath_stop)(struct ecore_dev *edev);
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void (*update_pf_params)(struct ecore_dev *edev,
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struct ecore_pf_params *params);
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int (*slowpath_start)(struct ecore_dev *edev,
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struct qed_slowpath_params *params);
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int (*set_fp_int)(struct ecore_dev *edev, uint16_t cnt);
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uint32_t (*sb_init)(struct ecore_dev *edev,
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struct ecore_sb_info *sb_info,
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void *sb_virt_addr,
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dma_addr_t sb_phy_addr,
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uint16_t sb_id);
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int (*get_sb_info)(struct ecore_dev *edev,
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struct ecore_sb_info *sb, u16 qid,
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struct ecore_sb_info_dbg *sb_dbg);
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bool (*can_link_change)(struct ecore_dev *edev);
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void (*update_msglvl)(struct ecore_dev *edev,
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uint32_t dp_module, uint8_t dp_level);
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int (*send_drv_state)(struct ecore_dev *edev, bool active);
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/* ############### DEBUG *************************/
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int (*dbg_grc)(struct ecore_dev *edev,
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void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_grc_size)(struct ecore_dev *edev);
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int (*dbg_idle_chk)(struct ecore_dev *edev,
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void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_idle_chk_size)(struct ecore_dev *edev);
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int (*dbg_reg_fifo)(struct ecore_dev *edev,
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void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_reg_fifo_size)(struct ecore_dev *edev);
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int (*dbg_mcp_trace)(struct ecore_dev *edev,
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void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_mcp_trace_size)(struct ecore_dev *edev);
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int (*dbg_protection_override)(struct ecore_dev *edev, void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_protection_override_size)(struct ecore_dev *edev);
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int (*dbg_igu_fifo_size)(struct ecore_dev *edev);
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int (*dbg_igu_fifo)(struct ecore_dev *edev, void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_fw_asserts)(struct ecore_dev *edev, void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_fw_asserts_size)(struct ecore_dev *edev);
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int (*dbg_ilt)(struct ecore_dev *edev, void *buffer,
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u32 *num_dumped_bytes);
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int (*dbg_ilt_size)(struct ecore_dev *edev);
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u8 (*dbg_get_debug_engine)(struct ecore_dev *edev);
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void (*dbg_set_debug_engine)(struct ecore_dev *edev,
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int engine_number);
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};
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/* Externs */
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const struct qed_eth_ops *qed_get_eth_ops(void);
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#endif /* _QEDE_IF_H */
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