Anoob Joseph aa6dc34fe3 crypto/cnxk: align HW accessible fields to ROC ... Hardware accessible memory need to be aligned to ROC. Enforced the same. Moved software specific fields to padding space. Signed-off-by: Anoob Joseph <anoobj@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>		2022-10-29 13:01:38 +02:00
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baseband	baseband/turbo_sw: remove Flexran SDK build option	2022-10-29 13:01:37 +02:00
bus	bus/vdev: fix crash in device cleanup	2022-10-20 11:35:07 +02:00
common	common/cnxk: add CPT LF reset sequence	2022-10-29 13:01:38 +02:00
compress	common/mlx5: fix disabling build	2022-10-30 15:55:10 +01:00
crypto	crypto/cnxk: align HW accessible fields to ROC	2022-10-29 13:01:38 +02:00
dma	dma/idxd: check DSA device allocation	2022-10-10 17:53:18 +02:00
event	net/cnxk: remove unnecessary DPTR update	2022-10-18 12:59:55 +02:00
gpu	dev: hide driver object	2022-09-23 16:14:34 +02:00
mempool	drivers: mark SW PMDs to support disabling IOVA as PA	2022-10-09 13:14:57 +02:00
net	common/mlx5: move build config initialization and check	2022-10-30 15:55:46 +01:00
raw	raw/cnxk_bphy: extend PF function address access	2022-10-26 23:19:19 +02:00
regex	common/mlx5: fix disabling build	2022-10-30 15:55:10 +01:00
vdpa	common/mlx5: fix disabling build	2022-10-30 15:55:10 +01:00
meson.build	build: export include directories list	2022-10-28 14:27:48 +02:00