Tomasz Duszynski d1422d107d common/cnxk: support CNF950_A0 ... Add PCI IDs which match CNF95O_A0 SoC. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>		2022-06-01 22:30:32 +02:00
..
cnxk	common/cnxk: support CNF950_A0	2022-06-01 22:30:32 +02:00
dlb2	event/dlb2: allow CQ depths up to 1024	2022-05-17 16:42:31 +02:00
dpaa	eventdev: negate maintenance capability flag	2021-11-15 08:22:38 +01:00
dpaa2	net/dpaa2: support multiple Tx queues enqueue for ordered	2022-01-20 16:24:08 +01:00
dsw	fix spelling in comments and strings	2022-01-11 12:16:53 +01:00
octeontx	fix spelling in comments and strings	2022-01-11 12:16:53 +01:00
opdl	fix spelling in comments and strings	2022-01-11 12:16:53 +01:00
skeleton	eventdev: negate maintenance capability flag	2021-11-15 08:22:38 +01:00
sw	remove unnecessary null checks	2022-02-12 12:07:48 +01:00
meson.build	drivers: remove octeontx2 drivers	2022-01-12 15:36:32 +01:00