64c239b7f8
Fix to advertise device's link speed capability based on NVM
port configuration instead of returning driver supported speeds.
Fixes: 95e67b479506 ("net/qede: add 100G link speed capability")
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
173 lines
4.9 KiB
C
173 lines
4.9 KiB
C
/*
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* Copyright (c) 2016 QLogic Corporation.
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* All rights reserved.
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* www.qlogic.com
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*
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* See LICENSE.qede_pmd for copyright and licensing details.
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*/
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#ifndef _QEDE_ETHDEV_H_
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#define _QEDE_ETHDEV_H_
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#include <sys/queue.h>
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#include <rte_ether.h>
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#include <rte_ethdev.h>
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#include <rte_dev.h>
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/* ecore includes */
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#include "base/bcm_osal.h"
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#include "base/ecore.h"
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#include "base/ecore_dev_api.h"
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#include "base/ecore_l2_api.h"
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#include "base/ecore_vf_api.h"
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#include "base/ecore_hsi_common.h"
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#include "base/ecore_int_api.h"
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#include "base/ecore_chain.h"
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#include "base/ecore_status.h"
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#include "base/ecore_hsi_eth.h"
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#include "base/ecore_dev_api.h"
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#include "base/ecore_iov_api.h"
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#include "base/ecore_cxt.h"
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#include "base/nvm_cfg.h"
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#include "qede_logs.h"
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#include "qede_if.h"
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#include "qede_eth_if.h"
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#include "qede_rxtx.h"
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#define qede_stringify1(x...) #x
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#define qede_stringify(x...) qede_stringify1(x)
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/* Driver versions */
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#define QEDE_PMD_VER_PREFIX "QEDE PMD"
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#define QEDE_PMD_VERSION_MAJOR 1
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#define QEDE_PMD_VERSION_MINOR 2
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#define QEDE_PMD_VERSION_REVISION 0
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#define QEDE_PMD_VERSION_PATCH 1
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#define QEDE_PMD_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) "." \
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qede_stringify(QEDE_PMD_VERSION_MINOR) "." \
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qede_stringify(QEDE_PMD_VERSION_REVISION) "." \
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qede_stringify(QEDE_PMD_VERSION_PATCH)
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#define QEDE_PMD_DRV_VER_STR_SIZE NAME_SIZE
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#define QEDE_PMD_VER_PREFIX "QEDE PMD"
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#define QEDE_RSS_INDIR_INITED (1 << 0)
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#define QEDE_RSS_KEY_INITED (1 << 1)
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#define QEDE_RSS_CAPS_INITED (1 << 2)
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#define QEDE_MAX_RSS_CNT(edev) ((edev)->dev_info.num_queues)
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#define QEDE_MAX_TSS_CNT(edev) ((edev)->dev_info.num_queues * \
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(edev)->dev_info.num_tc)
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#define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
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#define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
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#define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
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(qdev)->num_tc)
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#define QEDE_FASTPATH_TX (1 << 0)
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#define QEDE_FASTPATH_RX (1 << 1)
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#define QEDE_DUPLEX_FULL 1
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#define QEDE_DUPLEX_HALF 2
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#define QEDE_DUPLEX_UNKNOWN 0xff
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#define QEDE_SUPPORTED_AUTONEG (1 << 6)
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#define QEDE_SUPPORTED_PAUSE (1 << 13)
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#define QEDE_INIT_QDEV(eth_dev) (eth_dev->data->dev_private)
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#define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)
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#define QEDE_INIT(eth_dev) { \
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struct qede_dev *qdev = eth_dev->data->dev_private; \
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struct ecore_dev *edev = &qdev->edev; \
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}
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/************* QLogic 25G/40G/100G vendor/devices ids *************/
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#define PCI_VENDOR_ID_QLOGIC 0x1077
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#define CHIP_NUM_57980E 0x1634
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#define CHIP_NUM_57980S 0x1629
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#define CHIP_NUM_VF 0x1630
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#define CHIP_NUM_57980S_40 0x1634
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#define CHIP_NUM_57980S_25 0x1656
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#define CHIP_NUM_57980S_IOV 0x1664
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#define CHIP_NUM_57980S_100 0x1644
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#define PCI_DEVICE_ID_NX2_57980E CHIP_NUM_57980E
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#define PCI_DEVICE_ID_NX2_57980S CHIP_NUM_57980S
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#define PCI_DEVICE_ID_NX2_VF CHIP_NUM_VF
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#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
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#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
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#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
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#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
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extern char fw_file[];
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/* Port/function states */
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enum qede_dev_state {
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QEDE_DEV_INIT, /* Init the chip and Slowpath */
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QEDE_DEV_CONFIG, /* Create Vport/Fastpath resources */
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QEDE_DEV_START, /* Start RX/TX queues, enable traffic */
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QEDE_DEV_STOP, /* Deactivate vport and stop traffic */
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};
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struct qede_vlan_entry {
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SLIST_ENTRY(qede_vlan_entry) list;
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uint16_t vid;
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};
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/*
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* Structure to store private data for each port.
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*/
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struct qede_dev {
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struct ecore_dev edev;
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uint8_t protocol;
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const struct qed_eth_ops *ops;
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struct qed_dev_eth_info dev_info;
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struct ecore_sb_info *sb_array;
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struct qede_fastpath *fp_array;
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uint8_t num_tc;
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uint16_t mtu;
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bool rss_enabled;
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struct qed_update_vport_rss_params rss_params;
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uint32_t flags;
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bool gro_disable;
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uint16_t num_queues;
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uint8_t fp_num_tx;
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uint8_t fp_num_rx;
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enum qede_dev_state state;
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SLIST_HEAD(vlan_list_head, qede_vlan_entry)vlan_list_head;
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uint16_t configured_vlans;
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bool accept_any_vlan;
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struct ether_addr primary_mac;
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bool handle_hw_err;
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char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
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};
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/* Static functions */
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static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
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uint16_t vlan_id, int on);
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static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
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struct rte_eth_rss_conf *rss_conf);
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static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
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struct rte_eth_rss_reta_entry64 *reta_conf,
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uint16_t reta_size);
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/* Non-static functions */
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void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf);
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int qed_fill_eth_dev_info(struct ecore_dev *edev,
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struct qed_dev_eth_info *info);
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int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
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#endif /* _QEDE_ETHDEV_H_ */
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