369991d997
Replace the BSD license header with the SPDX tag for files with only an Intel copyright on them. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
88 lines
2.5 KiB
C
88 lines
2.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation
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*/
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#ifndef _RTE_ACL_VECT_H_
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#define _RTE_ACL_VECT_H_
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/**
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* @file
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*
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* RTE ACL SSE/AVX related header.
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Takes 2 SIMD registers containing N transitions eachi (tr0, tr1).
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* Shuffles it into different representation:
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* lo - contains low 32 bits of given N transitions.
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* hi - contains high 32 bits of given N transitions.
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*/
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#define ACL_TR_HILO(P, TC, tr0, tr1, lo, hi) do { \
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lo = (typeof(lo))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0x88); \
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hi = (typeof(hi))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0xdd); \
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} while (0)
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/*
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* Calculate the address of the next transition for
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* all types of nodes. Note that only DFA nodes and range
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* nodes actually transition to another node. Match
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* nodes not supposed to be encountered here.
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* For quad range nodes:
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* Calculate number of range boundaries that are less than the
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* input value. Range boundaries for each node are in signed 8 bit,
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* ordered from -128 to 127.
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* This is effectively a popcnt of bytes that are greater than the
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* input byte.
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* Single nodes are processed in the same ways as quad range nodes.
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*/
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#define ACL_TR_CALC_ADDR(P, S, \
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addr, index_mask, next_input, shuffle_input, \
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ones_16, range_base, tr_lo, tr_hi) do { \
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\
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typeof(addr) in, node_type, r, t; \
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typeof(addr) dfa_msk, dfa_ofs, quad_ofs; \
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\
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t = _##P##_xor_si##S(index_mask, index_mask); \
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in = _##P##_shuffle_epi8(next_input, shuffle_input); \
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\
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/* Calc node type and node addr */ \
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node_type = _##P##_andnot_si##S(index_mask, tr_lo); \
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addr = _##P##_and_si##S(index_mask, tr_lo); \
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\
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/* mask for DFA type(0) nodes */ \
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dfa_msk = _##P##_cmpeq_epi32(node_type, t); \
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\
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/* DFA calculations. */ \
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r = _##P##_srli_epi32(in, 30); \
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r = _##P##_add_epi8(r, range_base); \
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t = _##P##_srli_epi32(in, 24); \
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r = _##P##_shuffle_epi8(tr_hi, r); \
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\
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dfa_ofs = _##P##_sub_epi32(t, r); \
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\
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/* QUAD/SINGLE caluclations. */ \
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t = _##P##_cmpgt_epi8(in, tr_hi); \
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t = _##P##_sign_epi8(t, t); \
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t = _##P##_maddubs_epi16(t, t); \
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quad_ofs = _##P##_madd_epi16(t, ones_16); \
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\
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/* blend DFA and QUAD/SINGLE. */ \
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t = _##P##_blendv_epi8(quad_ofs, dfa_ofs, dfa_msk); \
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\
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/* calculate address for next transitions. */ \
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addr = _##P##_add_epi32(addr, t); \
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} while (0)
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_ACL_VECT_H_ */
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