56bb3c84e9
To support more bus types, remove PCI dependency where possible. Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
724 lines
19 KiB
C
724 lines
19 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2015 6WIND S.A.
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* Copyright 2015 Mellanox Technologies, Ltd
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*/
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#include <stddef.h>
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#include <unistd.h>
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#include <string.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <errno.h>
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#include <ethdev_driver.h>
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#include <rte_bus_pci.h>
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#include <rte_mbuf.h>
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#include <rte_common.h>
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#include <rte_interrupts.h>
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#include <rte_malloc.h>
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#include <rte_string_fns.h>
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#include <rte_rwlock.h>
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#include <rte_cycles.h>
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#include <mlx5_malloc.h>
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#include "mlx5_rxtx.h"
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#include "mlx5_rx.h"
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#include "mlx5_tx.h"
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#include "mlx5_autoconf.h"
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/**
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* Get the interface index from device name.
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*
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* @param[in] dev
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* Pointer to Ethernet device.
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*
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* @return
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* Nonzero interface index on success, zero otherwise and rte_errno is set.
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*/
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unsigned int
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mlx5_ifindex(const struct rte_eth_dev *dev)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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unsigned int ifindex;
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MLX5_ASSERT(priv);
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MLX5_ASSERT(priv->if_index);
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if (priv->master && priv->sh->bond.ifindex > 0)
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ifindex = priv->sh->bond.ifindex;
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else
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ifindex = priv->if_index;
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if (!ifindex)
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rte_errno = ENXIO;
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return ifindex;
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}
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/**
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* DPDK callback for Ethernet device configuration.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_dev_configure(struct rte_eth_dev *dev)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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unsigned int rxqs_n = dev->data->nb_rx_queues;
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unsigned int txqs_n = dev->data->nb_tx_queues;
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const uint8_t use_app_rss_key =
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!!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
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int ret = 0;
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if (use_app_rss_key &&
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(dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
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MLX5_RSS_HASH_KEY_LEN)) {
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DRV_LOG(ERR, "port %u RSS key len must be %s Bytes long",
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dev->data->port_id, RTE_STR(MLX5_RSS_HASH_KEY_LEN));
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rte_errno = EINVAL;
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return -rte_errno;
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}
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priv->rss_conf.rss_key =
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mlx5_realloc(priv->rss_conf.rss_key, MLX5_MEM_RTE,
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MLX5_RSS_HASH_KEY_LEN, 0, SOCKET_ID_ANY);
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if (!priv->rss_conf.rss_key) {
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DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
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dev->data->port_id, rxqs_n);
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rte_errno = ENOMEM;
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return -rte_errno;
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}
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if ((dev->data->dev_conf.txmode.offloads &
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DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP) &&
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rte_mbuf_dyn_tx_timestamp_register(NULL, NULL) != 0) {
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DRV_LOG(ERR, "port %u cannot register Tx timestamp field/flag",
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dev->data->port_id);
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return -rte_errno;
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}
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memcpy(priv->rss_conf.rss_key,
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use_app_rss_key ?
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dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
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rss_hash_default_key,
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MLX5_RSS_HASH_KEY_LEN);
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priv->rss_conf.rss_key_len = MLX5_RSS_HASH_KEY_LEN;
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priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
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priv->rxqs = (void *)dev->data->rx_queues;
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priv->txqs = (void *)dev->data->tx_queues;
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if (txqs_n != priv->txqs_n) {
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DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
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dev->data->port_id, priv->txqs_n, txqs_n);
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priv->txqs_n = txqs_n;
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}
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if (rxqs_n > priv->config.ind_table_max_size) {
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DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
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dev->data->port_id, rxqs_n);
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rte_errno = EINVAL;
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return -rte_errno;
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}
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if (rxqs_n != priv->rxqs_n) {
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DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
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dev->data->port_id, priv->rxqs_n, rxqs_n);
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priv->rxqs_n = rxqs_n;
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}
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priv->skip_default_rss_reta = 0;
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ret = mlx5_proc_priv_init(dev);
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if (ret)
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return ret;
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return 0;
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}
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/**
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* Configure default RSS reta.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_dev_configure_rss_reta(struct rte_eth_dev *dev)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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unsigned int rxqs_n = dev->data->nb_rx_queues;
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unsigned int i;
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unsigned int j;
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unsigned int reta_idx_n;
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int ret = 0;
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unsigned int *rss_queue_arr = NULL;
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unsigned int rss_queue_n = 0;
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if (priv->skip_default_rss_reta)
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return ret;
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rss_queue_arr = mlx5_malloc(0, rxqs_n * sizeof(unsigned int), 0,
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SOCKET_ID_ANY);
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if (!rss_queue_arr) {
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DRV_LOG(ERR, "port %u cannot allocate RSS queue list (%u)",
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dev->data->port_id, rxqs_n);
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rte_errno = ENOMEM;
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return -rte_errno;
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}
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for (i = 0, j = 0; i < rxqs_n; i++) {
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struct mlx5_rxq_data *rxq_data;
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struct mlx5_rxq_ctrl *rxq_ctrl;
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rxq_data = (*priv->rxqs)[i];
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rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
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if (rxq_ctrl && rxq_ctrl->type == MLX5_RXQ_TYPE_STANDARD)
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rss_queue_arr[j++] = i;
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}
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rss_queue_n = j;
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if (rss_queue_n > priv->config.ind_table_max_size) {
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DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
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dev->data->port_id, rss_queue_n);
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rte_errno = EINVAL;
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mlx5_free(rss_queue_arr);
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return -rte_errno;
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}
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DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
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dev->data->port_id, priv->rxqs_n, rxqs_n);
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priv->rxqs_n = rxqs_n;
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/*
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* If the requested number of RX queues is not a power of two,
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* use the maximum indirection table size for better balancing.
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* The result is always rounded to the next power of two.
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*/
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reta_idx_n = (1 << log2above((rss_queue_n & (rss_queue_n - 1)) ?
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priv->config.ind_table_max_size :
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rss_queue_n));
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ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
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if (ret) {
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mlx5_free(rss_queue_arr);
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return ret;
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}
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/*
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* When the number of RX queues is not a power of two,
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* the remaining table entries are padded with reused WQs
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* and hashes are not spread uniformly.
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*/
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for (i = 0, j = 0; (i != reta_idx_n); ++i) {
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(*priv->reta_idx)[i] = rss_queue_arr[j];
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if (++j == rss_queue_n)
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j = 0;
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}
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mlx5_free(rss_queue_arr);
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return ret;
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}
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/**
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* Sets default tuning parameters.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param[out] info
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* Info structure output buffer.
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*/
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static void
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mlx5_set_default_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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/* Minimum CPU utilization. */
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info->default_rxportconf.ring_size = 256;
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info->default_txportconf.ring_size = 256;
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info->default_rxportconf.burst_size = MLX5_RX_DEFAULT_BURST;
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info->default_txportconf.burst_size = MLX5_TX_DEFAULT_BURST;
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if ((priv->link_speed_capa & ETH_LINK_SPEED_200G) |
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(priv->link_speed_capa & ETH_LINK_SPEED_100G)) {
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info->default_rxportconf.nb_queues = 16;
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info->default_txportconf.nb_queues = 16;
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if (dev->data->nb_rx_queues > 2 ||
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dev->data->nb_tx_queues > 2) {
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/* Max Throughput. */
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info->default_rxportconf.ring_size = 2048;
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info->default_txportconf.ring_size = 2048;
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}
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} else {
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info->default_rxportconf.nb_queues = 8;
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info->default_txportconf.nb_queues = 8;
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if (dev->data->nb_rx_queues > 2 ||
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dev->data->nb_tx_queues > 2) {
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/* Max Throughput. */
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info->default_rxportconf.ring_size = 4096;
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info->default_txportconf.ring_size = 4096;
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}
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}
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}
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/**
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* Sets tx mbuf limiting parameters.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param[out] info
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* Info structure output buffer.
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*/
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static void
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mlx5_set_txlimit_params(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_dev_config *config = &priv->config;
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unsigned int inlen;
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uint16_t nb_max;
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inlen = (config->txq_inline_max == MLX5_ARG_UNSET) ?
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MLX5_SEND_DEF_INLINE_LEN :
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(unsigned int)config->txq_inline_max;
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MLX5_ASSERT(config->txq_inline_min >= 0);
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inlen = RTE_MAX(inlen, (unsigned int)config->txq_inline_min);
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inlen = RTE_MIN(inlen, MLX5_WQE_SIZE_MAX +
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MLX5_ESEG_MIN_INLINE_SIZE -
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MLX5_WQE_CSEG_SIZE -
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MLX5_WQE_ESEG_SIZE -
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MLX5_WQE_DSEG_SIZE * 2);
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nb_max = (MLX5_WQE_SIZE_MAX +
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MLX5_ESEG_MIN_INLINE_SIZE -
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MLX5_WQE_CSEG_SIZE -
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MLX5_WQE_ESEG_SIZE -
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MLX5_WQE_DSEG_SIZE -
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inlen) / MLX5_WSEG_SIZE;
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info->tx_desc_lim.nb_seg_max = nb_max;
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info->tx_desc_lim.nb_mtu_seg_max = nb_max;
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}
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/**
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* DPDK callback to get information about the device.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param[out] info
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* Info structure output buffer.
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*/
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int
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mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_dev_config *config = &priv->config;
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unsigned int max;
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/* FIXME: we should ask the device for these values. */
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info->min_rx_bufsize = 32;
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info->max_rx_pktlen = 65536;
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info->max_lro_pkt_size = MLX5_MAX_LRO_SIZE;
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/*
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* Since we need one CQ per QP, the limit is the minimum number
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* between the two values.
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*/
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max = RTE_MIN(priv->sh->device_attr.max_cq,
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priv->sh->device_attr.max_qp);
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/* max_rx_queues is uint16_t. */
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max = RTE_MIN(max, (unsigned int)UINT16_MAX);
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info->max_rx_queues = max;
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info->max_tx_queues = max;
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info->max_mac_addrs = MLX5_MAX_UC_MAC_ADDRESSES;
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info->rx_queue_offload_capa = mlx5_get_rx_queue_offloads(dev);
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info->rx_seg_capa.max_nseg = MLX5_MAX_RXQ_NSEG;
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info->rx_seg_capa.multi_pools = !config->mprq.enabled;
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info->rx_seg_capa.offset_allowed = !config->mprq.enabled;
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info->rx_seg_capa.offset_align_log2 = 0;
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info->rx_offload_capa = (mlx5_get_rx_port_offloads() |
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info->rx_queue_offload_capa);
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info->tx_offload_capa = mlx5_get_tx_port_offloads(dev);
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info->if_index = mlx5_ifindex(dev);
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info->reta_size = priv->reta_idx_n ?
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priv->reta_idx_n : config->ind_table_max_size;
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info->hash_key_size = MLX5_RSS_HASH_KEY_LEN;
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info->speed_capa = priv->link_speed_capa;
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info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
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mlx5_set_default_params(dev, info);
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mlx5_set_txlimit_params(dev, info);
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info->switch_info.name = dev->data->name;
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info->switch_info.domain_id = priv->domain_id;
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info->switch_info.port_id = priv->representor_id;
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if (priv->representor) {
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uint16_t port_id;
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MLX5_ETH_FOREACH_DEV(port_id, dev->device) {
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struct mlx5_priv *opriv =
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rte_eth_devices[port_id].data->dev_private;
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if (!opriv ||
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opriv->representor ||
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opriv->sh != priv->sh ||
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opriv->domain_id != priv->domain_id)
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continue;
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/*
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* Override switch name with that of the master
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* device.
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*/
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info->switch_info.name = opriv->dev_data->name;
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break;
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}
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}
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return 0;
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}
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/**
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* Calculate representor ID from port switch info.
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*
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* Uint16 representor ID bits definition:
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* pf: 2
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* type: 2
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* vf/sf: 12
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*
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* @param info
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* Port switch info.
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* @param hpf_type
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* Use this type if port is HPF.
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*
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* @return
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* Encoded representor ID.
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*/
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uint16_t
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mlx5_representor_id_encode(const struct mlx5_switch_info *info,
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enum rte_eth_representor_type hpf_type)
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{
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enum rte_eth_representor_type type = RTE_ETH_REPRESENTOR_VF;
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uint16_t repr = info->port_name;
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if (info->representor == 0)
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return UINT16_MAX;
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if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFSF)
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type = RTE_ETH_REPRESENTOR_SF;
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if (info->name_type == MLX5_PHYS_PORT_NAME_TYPE_PFHPF) {
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type = hpf_type;
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repr = UINT16_MAX;
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}
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return MLX5_REPRESENTOR_ID(info->pf_num, type, repr);
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}
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/**
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* DPDK callback to get information about representor.
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*
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* Representor ID bits definition:
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* vf/sf: 12
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* type: 2
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* pf: 2
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param[out] info
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* Nullable info structure output buffer.
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*
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* @return
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* negative on error, or the number of representor ranges.
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*/
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int
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mlx5_representor_info_get(struct rte_eth_dev *dev,
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struct rte_eth_representor_info *info)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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int n_type = 4; /* Representor types, VF, HPF@VF, SF and HPF@SF. */
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int n_pf = 2; /* Number of PFs. */
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int i = 0, pf;
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int n_entries;
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if (info == NULL)
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goto out;
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n_entries = n_type * n_pf;
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if ((uint32_t)n_entries > info->nb_ranges_alloc)
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n_entries = info->nb_ranges_alloc;
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info->controller = 0;
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info->pf = priv->pf_bond >= 0 ? priv->pf_bond : 0;
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for (pf = 0; pf < n_pf; ++pf) {
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/* VF range. */
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info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
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info->ranges[i].controller = 0;
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info->ranges[i].pf = pf;
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info->ranges[i].vf = 0;
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info->ranges[i].id_base =
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MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
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info->ranges[i].id_end =
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MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
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snprintf(info->ranges[i].name,
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sizeof(info->ranges[i].name), "pf%dvf", pf);
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i++;
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if (i == n_entries)
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break;
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/* HPF range of VF type. */
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info->ranges[i].type = RTE_ETH_REPRESENTOR_VF;
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info->ranges[i].controller = 0;
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info->ranges[i].pf = pf;
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info->ranges[i].vf = UINT16_MAX;
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info->ranges[i].id_base =
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MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
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info->ranges[i].id_end =
|
|
MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
|
|
snprintf(info->ranges[i].name,
|
|
sizeof(info->ranges[i].name), "pf%dvf", pf);
|
|
i++;
|
|
if (i == n_entries)
|
|
break;
|
|
/* SF range. */
|
|
info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
|
|
info->ranges[i].controller = 0;
|
|
info->ranges[i].pf = pf;
|
|
info->ranges[i].vf = 0;
|
|
info->ranges[i].id_base =
|
|
MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, 0);
|
|
info->ranges[i].id_end =
|
|
MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
|
|
snprintf(info->ranges[i].name,
|
|
sizeof(info->ranges[i].name), "pf%dsf", pf);
|
|
i++;
|
|
if (i == n_entries)
|
|
break;
|
|
/* HPF range of SF type. */
|
|
info->ranges[i].type = RTE_ETH_REPRESENTOR_SF;
|
|
info->ranges[i].controller = 0;
|
|
info->ranges[i].pf = pf;
|
|
info->ranges[i].vf = UINT16_MAX;
|
|
info->ranges[i].id_base =
|
|
MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
|
|
info->ranges[i].id_end =
|
|
MLX5_REPRESENTOR_ID(pf, info->ranges[i].type, -1);
|
|
snprintf(info->ranges[i].name,
|
|
sizeof(info->ranges[i].name), "pf%dsf", pf);
|
|
i++;
|
|
if (i == n_entries)
|
|
break;
|
|
}
|
|
info->nb_ranges = i;
|
|
out:
|
|
return n_type * n_pf;
|
|
}
|
|
|
|
/**
|
|
* Get firmware version of a device.
|
|
*
|
|
* @param dev
|
|
* Ethernet device port.
|
|
* @param fw_ver
|
|
* String output allocated by caller.
|
|
* @param fw_size
|
|
* Size of the output string, including terminating null byte.
|
|
*
|
|
* @return
|
|
* 0 on success, or the size of the non truncated string if too big.
|
|
*/
|
|
int
|
|
mlx5_fw_version_get(struct rte_eth_dev *dev, char *fw_ver, size_t fw_size)
|
|
{
|
|
struct mlx5_priv *priv = dev->data->dev_private;
|
|
struct mlx5_dev_attr *attr = &priv->sh->device_attr;
|
|
size_t size = strnlen(attr->fw_ver, sizeof(attr->fw_ver)) + 1;
|
|
|
|
if (fw_size < size)
|
|
return size;
|
|
if (fw_ver != NULL)
|
|
strlcpy(fw_ver, attr->fw_ver, fw_size);
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* Get supported packet types.
|
|
*
|
|
* @param dev
|
|
* Pointer to Ethernet device structure.
|
|
*
|
|
* @return
|
|
* A pointer to the supported Packet types array.
|
|
*/
|
|
const uint32_t *
|
|
mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
|
|
{
|
|
static const uint32_t ptypes[] = {
|
|
/* refers to rxq_cq_to_pkt_type() */
|
|
RTE_PTYPE_L2_ETHER,
|
|
RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
|
|
RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
|
|
RTE_PTYPE_L4_NONFRAG,
|
|
RTE_PTYPE_L4_FRAG,
|
|
RTE_PTYPE_L4_TCP,
|
|
RTE_PTYPE_L4_UDP,
|
|
RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
|
|
RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
|
|
RTE_PTYPE_INNER_L4_NONFRAG,
|
|
RTE_PTYPE_INNER_L4_FRAG,
|
|
RTE_PTYPE_INNER_L4_TCP,
|
|
RTE_PTYPE_INNER_L4_UDP,
|
|
RTE_PTYPE_UNKNOWN
|
|
};
|
|
|
|
if (dev->rx_pkt_burst == mlx5_rx_burst ||
|
|
dev->rx_pkt_burst == mlx5_rx_burst_mprq ||
|
|
dev->rx_pkt_burst == mlx5_rx_burst_vec ||
|
|
dev->rx_pkt_burst == mlx5_rx_burst_mprq_vec)
|
|
return ptypes;
|
|
return NULL;
|
|
}
|
|
|
|
/**
|
|
* DPDK callback to change the MTU.
|
|
*
|
|
* @param dev
|
|
* Pointer to Ethernet device structure.
|
|
* @param in_mtu
|
|
* New MTU.
|
|
*
|
|
* @return
|
|
* 0 on success, a negative errno value otherwise and rte_errno is set.
|
|
*/
|
|
int
|
|
mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
|
|
{
|
|
struct mlx5_priv *priv = dev->data->dev_private;
|
|
uint16_t kern_mtu = 0;
|
|
int ret;
|
|
|
|
ret = mlx5_get_mtu(dev, &kern_mtu);
|
|
if (ret)
|
|
return ret;
|
|
/* Set kernel interface MTU first. */
|
|
ret = mlx5_set_mtu(dev, mtu);
|
|
if (ret)
|
|
return ret;
|
|
ret = mlx5_get_mtu(dev, &kern_mtu);
|
|
if (ret)
|
|
return ret;
|
|
if (kern_mtu == mtu) {
|
|
priv->mtu = mtu;
|
|
DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
|
|
dev->data->port_id, mtu);
|
|
return 0;
|
|
}
|
|
rte_errno = EAGAIN;
|
|
return -rte_errno;
|
|
}
|
|
|
|
/**
|
|
* Configure the RX function to use.
|
|
*
|
|
* @param dev
|
|
* Pointer to private data structure.
|
|
*
|
|
* @return
|
|
* Pointer to selected Rx burst function.
|
|
*/
|
|
eth_rx_burst_t
|
|
mlx5_select_rx_function(struct rte_eth_dev *dev)
|
|
{
|
|
eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
|
|
|
|
MLX5_ASSERT(dev != NULL);
|
|
if (mlx5_check_vec_rx_support(dev) > 0) {
|
|
if (mlx5_mprq_enabled(dev)) {
|
|
rx_pkt_burst = mlx5_rx_burst_mprq_vec;
|
|
DRV_LOG(DEBUG, "port %u selected vectorized"
|
|
" MPRQ Rx function", dev->data->port_id);
|
|
} else {
|
|
rx_pkt_burst = mlx5_rx_burst_vec;
|
|
DRV_LOG(DEBUG, "port %u selected vectorized"
|
|
" SPRQ Rx function", dev->data->port_id);
|
|
}
|
|
} else if (mlx5_mprq_enabled(dev)) {
|
|
rx_pkt_burst = mlx5_rx_burst_mprq;
|
|
DRV_LOG(DEBUG, "port %u selected MPRQ Rx function",
|
|
dev->data->port_id);
|
|
} else {
|
|
DRV_LOG(DEBUG, "port %u selected SPRQ Rx function",
|
|
dev->data->port_id);
|
|
}
|
|
return rx_pkt_burst;
|
|
}
|
|
|
|
/**
|
|
* Get the E-Switch parameters by port id.
|
|
*
|
|
* @param[in] port
|
|
* Device port id.
|
|
* @param[in] valid
|
|
* Device port id is valid, skip check. This flag is useful
|
|
* when trials are performed from probing and device is not
|
|
* flagged as valid yet (in attaching process).
|
|
* @param[out] es_domain_id
|
|
* E-Switch domain id.
|
|
* @param[out] es_port_id
|
|
* The port id of the port in the E-Switch.
|
|
*
|
|
* @return
|
|
* pointer to device private data structure containing data needed
|
|
* on success, NULL otherwise and rte_errno is set.
|
|
*/
|
|
struct mlx5_priv *
|
|
mlx5_port_to_eswitch_info(uint16_t port, bool valid)
|
|
{
|
|
struct rte_eth_dev *dev;
|
|
struct mlx5_priv *priv;
|
|
|
|
if (port >= RTE_MAX_ETHPORTS) {
|
|
rte_errno = EINVAL;
|
|
return NULL;
|
|
}
|
|
if (!valid && !rte_eth_dev_is_valid_port(port)) {
|
|
rte_errno = ENODEV;
|
|
return NULL;
|
|
}
|
|
dev = &rte_eth_devices[port];
|
|
priv = dev->data->dev_private;
|
|
if (!(priv->representor || priv->master)) {
|
|
rte_errno = EINVAL;
|
|
return NULL;
|
|
}
|
|
return priv;
|
|
}
|
|
|
|
/**
|
|
* Get the E-Switch parameters by device instance.
|
|
*
|
|
* @param[in] port
|
|
* Device port id.
|
|
* @param[out] es_domain_id
|
|
* E-Switch domain id.
|
|
* @param[out] es_port_id
|
|
* The port id of the port in the E-Switch.
|
|
*
|
|
* @return
|
|
* pointer to device private data structure containing data needed
|
|
* on success, NULL otherwise and rte_errno is set.
|
|
*/
|
|
struct mlx5_priv *
|
|
mlx5_dev_to_eswitch_info(struct rte_eth_dev *dev)
|
|
{
|
|
struct mlx5_priv *priv;
|
|
|
|
priv = dev->data->dev_private;
|
|
if (!(priv->representor || priv->master)) {
|
|
rte_errno = EINVAL;
|
|
return NULL;
|
|
}
|
|
return priv;
|
|
}
|
|
|
|
/**
|
|
* DPDK callback to retrieve hairpin capabilities.
|
|
*
|
|
* @param dev
|
|
* Pointer to Ethernet device structure.
|
|
* @param[out] cap
|
|
* Storage for hairpin capability data.
|
|
*
|
|
* @return
|
|
* 0 on success, a negative errno value otherwise and rte_errno is set.
|
|
*/
|
|
int
|
|
mlx5_hairpin_cap_get(struct rte_eth_dev *dev, struct rte_eth_hairpin_cap *cap)
|
|
{
|
|
struct mlx5_priv *priv = dev->data->dev_private;
|
|
struct mlx5_dev_config *config = &priv->config;
|
|
|
|
if (!priv->sh->devx || !config->dest_tir || !config->dv_flow_en) {
|
|
rte_errno = ENOTSUP;
|
|
return -rte_errno;
|
|
}
|
|
cap->max_nb_queues = UINT16_MAX;
|
|
cap->max_rx_2_tx = 1;
|
|
cap->max_tx_2_rx = 1;
|
|
cap->max_nb_desc = 8192;
|
|
return 0;
|
|
}
|