dd0eedb1cf
Re-enable CONFIG_RTE_LIBRTE_SCHED, since it is needed to build
correctly.
Fix a few warnings when compiling mpipe_tilegx.c.
Remove an empty rte_cpu_feature_table[] array using a bogus type.
Properly set RTE_OBJCOPY_{TARGET,ARCH} in mk/arch/tile/rte.vars.mk.
Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com>
74 lines
2.6 KiB
Plaintext
74 lines
2.6 KiB
Plaintext
# BSD LICENSE
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#
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# Copyright (C) EZchip Semiconductor 2015.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# * Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# * Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# * Neither the name of EZchip Semiconductor nor the names of its
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# contributors may be used to endorse or promote products derived
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# from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include "common_linuxapp"
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CONFIG_RTE_MACHINE="tilegx"
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CONFIG_RTE_ARCH="tile"
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CONFIG_RTE_ARCH_TILE=y
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CONFIG_RTE_ARCH_64=y
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CONFIG_RTE_ARCH_STRICT_ALIGN=y
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CONFIG_RTE_FORCE_INTRINSICS=y
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CONFIG_RTE_TOOLCHAIN="gcc"
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CONFIG_RTE_TOOLCHAIN_GCC=y
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CONFIG_RTE_MEMPOOL_ALIGN=128
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CONFIG_RTE_LIBRTE_MPIPE_PMD=y
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CONFIG_RTE_LIBRTE_MPIPE_PMD_DEBUG=n
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# Disable things that we don't support or need
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CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n
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CONFIG_RTE_EAL_IGB_UIO=n
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CONFIG_RTE_EAL_VFIO=n
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CONFIG_RTE_LIBRTE_KNI=n
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CONFIG_RTE_KNI_KMOD=n
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CONFIG_RTE_LIBRTE_XEN_DOM0=n
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CONFIG_RTE_LIBRTE_IGB_PMD=n
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CONFIG_RTE_LIBRTE_EM_PMD=n
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CONFIG_RTE_LIBRTE_IXGBE_PMD=n
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CONFIG_RTE_LIBRTE_I40E_PMD=n
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CONFIG_RTE_LIBRTE_FM10K_PMD=n
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CONFIG_RTE_LIBRTE_VIRTIO_PMD=n
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CONFIG_RTE_LIBRTE_VMXNET3_PMD=n
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CONFIG_RTE_LIBRTE_ENIC_PMD=n
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# This following libraries are not available on the tile architecture.
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# So they're turned off.
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CONFIG_RTE_LIBRTE_LPM=n
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CONFIG_RTE_LIBRTE_ACL=n
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CONFIG_RTE_LIBRTE_PORT=n
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CONFIG_RTE_LIBRTE_TABLE=n
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CONFIG_RTE_LIBRTE_PIPELINE=n
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CONFIG_RTE_LIBRTE_CXGBE_PMD=n
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CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
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