6e0ca01c93
Add input ports to the newly introduced SWX pipeline type. Each port instantiates a port type that defines the port operations, e.g. ethdev port, PCAP port, etc. The RX interface is single packet, with packet batching internally for performance. Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
37 lines
842 B
Meson
37 lines
842 B
Meson
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2017 Intel Corporation
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sources = files(
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'rte_port_ethdev.c',
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'rte_port_fd.c',
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'rte_port_frag.c',
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'rte_port_ras.c',
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'rte_port_ring.c',
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'rte_port_sched.c',
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'rte_port_source_sink.c',
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'rte_port_sym_crypto.c',
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'rte_port_eventdev.c')
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headers = files(
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'rte_port_ethdev.h',
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'rte_port_fd.h',
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'rte_port_frag.h',
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'rte_port_ras.h',
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'rte_port.h',
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'rte_port_ring.h',
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'rte_port_sched.h',
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'rte_port_source_sink.h',
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'rte_port_sym_crypto.h',
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'rte_port_eventdev.h',
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'rte_swx_port.h',)
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deps += ['ethdev', 'sched', 'ip_frag', 'cryptodev', 'eventdev']
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if dpdk_conf.has('RTE_PORT_PCAP')
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ext_deps += pcap_dep # dependency provided in config/meson.build
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endif
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if dpdk_conf.has('RTE_LIBRTE_KNI')
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sources += files('rte_port_kni.c')
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headers += files('rte_port_kni.h')
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deps += 'kni'
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endif
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