numam-dpdk/config/defconfig_arm64-armv8a-linuxapp-gcc
Ashwin Sekhar T K b79afd0b7e sched: add NEON optimizations
* Removed setting CONFIG_RTE_SCHED_VECTOR=n from armv8a config
  so that the setting from common_base is taken as the default
  setting for armv8a
* Verified the changes with sched_autotest unit test case

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Acked-by: Jianbo Liu <jianbo.liu@linaro.org>
2017-07-03 15:13:36 +02:00

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# BSD LICENSE
#
# Copyright (C) Cavium networks 2015. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
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#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
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# the documentation and/or other materials provided with the
# distribution.
# * Neither the name of Cavium networks nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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#
#include "common_linuxapp"
CONFIG_RTE_MACHINE="armv8a"
CONFIG_RTE_ARCH="arm64"
CONFIG_RTE_ARCH_ARM64=y
CONFIG_RTE_ARCH_64=y
CONFIG_RTE_FORCE_INTRINSICS=y
CONFIG_RTE_TOOLCHAIN="gcc"
CONFIG_RTE_TOOLCHAIN_GCC=y
# Maximum available cache line size in arm64 implementations.
# Setting to maximum available cache line size in generic config
# to address minimum DMA alignment across all arm64 implementations.
CONFIG_RTE_CACHE_LINE_SIZE=128
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_AVP_PMD=n