47c3f7a41a
This patch adds minimum enqueue threshold to Intel QuickAssist Technology PMD. It is an optimisation, configured by a command line option, which can be used to reduce MMIO write occurrences. Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
127 lines
3.1 KiB
C
127 lines
3.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#include "qat_common.h"
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#include "qat_device.h"
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#include "qat_logs.h"
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int
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qat_sgl_fill_array(struct rte_mbuf *buf, int64_t offset,
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void *list_in, uint32_t data_len,
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const uint16_t max_segs)
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{
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int res = -EINVAL;
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uint32_t buf_len, nr;
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struct qat_sgl *list = (struct qat_sgl *)list_in;
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#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
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uint8_t *virt_addr[max_segs];
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#endif
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for (nr = buf_len = 0; buf && nr < max_segs; buf = buf->next) {
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if (offset >= rte_pktmbuf_data_len(buf)) {
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offset -= rte_pktmbuf_data_len(buf);
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continue;
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}
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list->buffers[nr].len = rte_pktmbuf_data_len(buf) - offset;
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list->buffers[nr].resrvd = 0;
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list->buffers[nr].addr = rte_pktmbuf_iova_offset(buf, offset);
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#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
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virt_addr[nr] = rte_pktmbuf_mtod_offset(buf, uint8_t*, offset);
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#endif
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offset = 0;
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buf_len += list->buffers[nr].len;
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if (buf_len >= data_len) {
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list->buffers[nr].len -= buf_len - data_len;
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res = 0;
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break;
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}
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++nr;
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}
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if (unlikely(res != 0)) {
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if (nr == max_segs) {
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QAT_DP_LOG(ERR, "Exceeded max segments in QAT SGL (%u)",
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max_segs);
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} else {
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QAT_DP_LOG(ERR, "Mbuf chain is too short");
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}
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} else {
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list->num_bufs = ++nr;
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#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
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QAT_DP_LOG(INFO, "SGL with %d buffers:", list->num_bufs);
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for (nr = 0; nr < list->num_bufs; nr++) {
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QAT_DP_LOG(INFO,
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"QAT SGL buf %d, len = %d, iova = 0x%012"PRIx64,
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nr, list->buffers[nr].len,
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list->buffers[nr].addr);
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QAT_DP_HEXDUMP_LOG(DEBUG, "qat SGL",
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virt_addr[nr],
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list->buffers[nr].len);
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}
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#endif
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}
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return res;
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}
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void qat_stats_get(struct qat_pci_device *dev,
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struct qat_common_stats *stats,
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enum qat_service_type service)
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{
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int i;
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struct qat_qp **qp;
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if (stats == NULL || dev == NULL || service >= QAT_SERVICE_INVALID) {
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QAT_LOG(ERR, "invalid param: stats %p, dev %p, service %d",
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stats, dev, service);
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return;
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}
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qp = dev->qps_in_use[service];
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for (i = 0; i < ADF_MAX_QPS_ON_ANY_SERVICE; i++) {
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if (qp[i] == NULL) {
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QAT_LOG(DEBUG, "Service %d Uninitialised qp %d",
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service, i);
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continue;
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}
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stats->enqueued_count += qp[i]->stats.enqueued_count;
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stats->dequeued_count += qp[i]->stats.dequeued_count;
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stats->enqueue_err_count += qp[i]->stats.enqueue_err_count;
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stats->dequeue_err_count += qp[i]->stats.dequeue_err_count;
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stats->threshold_hit_count += qp[i]->stats.threshold_hit_count;
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QAT_LOG(DEBUG, "Threshold was used for qp %d %"PRIu64" times",
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i, stats->threshold_hit_count);
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}
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}
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void qat_stats_reset(struct qat_pci_device *dev,
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enum qat_service_type service)
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{
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int i;
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struct qat_qp **qp;
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if (dev == NULL || service >= QAT_SERVICE_INVALID) {
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QAT_LOG(ERR, "invalid param: dev %p, service %d",
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dev, service);
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return;
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}
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qp = dev->qps_in_use[service];
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for (i = 0; i < ADF_MAX_QPS_ON_ANY_SERVICE; i++) {
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if (qp[i] == NULL) {
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QAT_LOG(DEBUG, "Service %d Uninitialised qp %d",
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service, i);
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continue;
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}
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memset(&(qp[i]->stats), 0, sizeof(qp[i]->stats));
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}
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QAT_LOG(DEBUG, "QAT: %d stats cleared", service);
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}
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