numam-dpdk/config/x86/meson.build
Bruce Richardson 7d5cfaa750 build: fix formatting of Meson lists
Running "./devtools/check-meson.py --fix" on the DPDK repo fixes a
number of issues with whitespace and formatting of files:

* indentation of lists
* missing trailing commas on final list element
* multiple list entries per line when list is not all single-line

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 15:01:47 +02:00

60 lines
1.6 KiB
Meson

# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017-2020 Intel Corporation
# get binutils version for the workaround of Bug 97
if not is_windows
binutils_ok = run_command(binutils_avx512_check)
if binutils_ok.returncode() != 0 and cc.has_argument('-mno-avx512f')
machine_args += '-mno-avx512f'
warning('Binutils error with AVX512 assembly, disabling AVX512 support')
endif
endif
# we require SSE4.2 for DPDK
if cc.get_define('__SSE4_2__', args: machine_args) == ''
message('SSE 4.2 not enabled by default, explicitly enabling')
machine_args += '-msse4'
endif
base_flags = ['SSE', 'SSE2', 'SSE3','SSSE3', 'SSE4_1', 'SSE4_2']
foreach f:base_flags
compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
endforeach
optional_flags = [
'AES',
'AVX',
'AVX2',
'AVX512BW',
'AVX512CD',
'AVX512DQ',
'AVX512F',
'AVX512VL',
'PCLMUL',
'RDRND',
'RDSEED',
'VPCLMULQDQ',
]
foreach f:optional_flags
if cc.get_define('__@0@__'.format(f), args: machine_args) == '1'
if f == 'PCLMUL' # special case flags with different defines
f = 'PCLMULQDQ'
elif f == 'RDRND'
f = 'RDRAND'
endif
compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
endif
endforeach
dpdk_conf.set('RTE_ARCH_X86', 1)
if dpdk_conf.get('RTE_ARCH_64')
dpdk_conf.set('RTE_ARCH_X86_64', 1)
dpdk_conf.set('RTE_ARCH', 'x86_64')
else
dpdk_conf.set('RTE_ARCH_I686', 1)
dpdk_conf.set('RTE_ARCH', 'i686')
endif
dpdk_conf.set('RTE_CACHE_LINE_SIZE', 64)