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numam-dpdk/drivers/common/mlx5
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Suanming Mou caec80f92a common/mlx5: add UMR and RDMA write WQE definitions 
This patch adds the struct defining UMR and RDMA write WQEs.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:51:18 +02:00
..
linux common/mlx5: share Verbs device match function 2021-05-04 22:49:37 +02:00
windows common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
meson.build common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_devx.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_devx.h common/mlx5: share DevX RQ creation 2021-01-14 10:12:36 +01:00
mlx5_common_log.h common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_mp.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_mp.h net/mlx5: add queue start and stop 2020-07-21 15:46:30 +02:00
mlx5_common_mr.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_mr.h common/mlx5: add reg/dereg MR on Windows 2021-01-08 16:03:07 +01:00
mlx5_common_pci.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_pci.h compress/mlx5: introduce PMD 2021-01-27 20:40:03 +01:00
mlx5_common_utils.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common_utils.h common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_common.h common/mlx5: share Verbs device match function 2021-05-04 22:49:37 +02:00
mlx5_devx_cmds.c common/mlx5: support DevX register write access 2021-05-04 22:49:37 +02:00
mlx5_devx_cmds.h common/mlx5: support DevX register write access 2021-05-04 22:49:37 +02:00
mlx5_malloc.c common/mlx5: share hash list tool 2021-05-04 22:49:37 +02:00
mlx5_malloc.h common/mlx5: fix aligned malloc 2020-09-18 18:55:11 +02:00
mlx5_prm.h common/mlx5: add UMR and RDMA write WQE definitions 2021-05-04 22:51:18 +02:00
version.map common/mlx5: support DevX register write access 2021-05-04 22:49:37 +02:00