01d1847987
Optimized configuration for Marvell octeontx2 SoC. Updated meson build to support Marvell octeontx2 SoC. Added meson cross build target for octeontx2. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
19 lines
426 B
Plaintext
19 lines
426 B
Plaintext
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2018 Marvell International Ltd
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#
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#include "defconfig_arm64-armv8a-linux-gcc"
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CONFIG_RTE_MACHINE="octeontx2"
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CONFIG_RTE_CACHE_LINE_SIZE=128
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CONFIG_RTE_MAX_NUMA_NODES=1
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CONFIG_RTE_MAX_LCORE=24
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# Doesn't support NUMA
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CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
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CONFIG_RTE_LIBRTE_VHOST_NUMA=n
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# Recommend to use VFIO as co-processors needs SMMU/IOMMU
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CONFIG_RTE_EAL_IGB_UIO=n
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