6b5a857fb0
When log level is set to 7 (INFO) these messages are still displayed and should be set to DEBUG. Signed-off-by: Keith Wiles <keith.wiles@intel.com>
87 lines
2.7 KiB
C
87 lines
2.7 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <string.h>
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#include <stdio.h>
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#include <unistd.h>
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#include <inttypes.h>
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#include <sys/types.h>
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#include <errno.h>
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#include <rte_common.h>
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#include <rte_log.h>
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#include <rte_cycles.h>
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#include "eal_private.h"
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/* The frequency of the RDTSC timer resolution */
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static uint64_t eal_tsc_resolution_hz;
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void
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rte_delay_us(unsigned us)
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{
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const uint64_t start = rte_get_timer_cycles();
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const uint64_t ticks = (uint64_t)us * rte_get_timer_hz() / 1E6;
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while ((rte_get_timer_cycles() - start) < ticks)
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rte_pause();
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}
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uint64_t
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rte_get_tsc_hz(void)
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{
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return eal_tsc_resolution_hz;
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}
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static uint64_t
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estimate_tsc_freq(void)
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{
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RTE_LOG(WARNING, EAL, "WARNING: TSC frequency estimated roughly"
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" - clock timings may be less accurate.\n");
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/* assume that the sleep(1) will sleep for 1 second */
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uint64_t start = rte_rdtsc();
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sleep(1);
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return rte_rdtsc() - start;
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}
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void
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set_tsc_freq(void)
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{
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uint64_t freq = get_tsc_freq();
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if (!freq)
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freq = estimate_tsc_freq();
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RTE_LOG(DEBUG, EAL, "TSC frequency is ~%" PRIu64 " KHz\n", freq / 1000);
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eal_tsc_resolution_hz = freq;
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}
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