c1407bfa05
Added configure function notably to configure the device from the PF within DPDK and bbdev-test (without external dependency). That function is kept common to all ACC devices. Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Acked-by: Hernan Vargas <hernan.vargas@intel.com>
102 lines
2.9 KiB
C
102 lines
2.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2022 Intel Corporation
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*/
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#ifndef _RTE_ACC_COMMON_CFG_H_
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#define _RTE_ACC_COMMON_CFG_H_
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/**
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* @file rte_acc_common_cfg.h
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*
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* Functions for configuring ACC HW, exposed directly to applications.
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* Configuration related to encoding/decoding is done through the
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* librte_bbdev library.
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*
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* @warning
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* @b EXPERIMENTAL: this API may change without prior notice
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*/
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#include <stdint.h>
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#include <stdbool.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**< Maximum number of Virtual Functions ACC may support */
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#define RTE_ACC_NUM_VFS 64
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/**
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* Definition of Queue Topology for ACC Configuration
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* Some level of details is abstracted out to expose a clean interface
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* given that comprehensive flexibility is not required
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*/
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struct rte_acc_queue_topology {
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/** Number of QGroups in incremental order of priority */
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uint16_t num_qgroups;
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/**
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* All QGroups have the same number of AQs here.
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* Note : Could be made a 16-array if more flexibility is really
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* required
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*/
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uint16_t num_aqs_per_groups;
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/**
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* Depth of the AQs is the same of all QGroups here. Log2 Enum : 2^N
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* Note : Could be made a 16-array if more flexibility is really
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* required
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*/
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uint16_t aq_depth_log2;
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/**
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* Index of the first Queue Group Index - assuming contiguity
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* Initialized as -1
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*/
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int8_t first_qgroup_index;
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};
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/**
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* Definition of Arbitration related parameters for ACC Configuration
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*/
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struct rte_acc_arbitration {
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/** Default Weight for VF Fairness Arbitration */
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uint16_t round_robin_weight;
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uint32_t gbr_threshold1; /**< Guaranteed Bitrate Threshold 1 */
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uint32_t gbr_threshold2; /**< Guaranteed Bitrate Threshold 2 */
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};
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/**
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* Structure to pass ACC configuration.
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* Note: all VF Bundles will have the same configuration.
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*/
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struct rte_acc_conf {
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bool pf_mode_en; /**< 1 if PF is used for dataplane, 0 for VFs */
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/** 1 if input '1' bit is represented by a positive LLR value, 0 if '1'
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* bit is represented by a negative value.
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*/
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bool input_pos_llr_1_bit;
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/** 1 if output '1' bit is represented by a positive value, 0 if '1'
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* bit is represented by a negative value.
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*/
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bool output_pos_llr_1_bit;
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uint16_t num_vf_bundles; /**< Number of VF bundles to setup */
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/** Queue topology for each operation type */
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struct rte_acc_queue_topology q_ul_4g;
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struct rte_acc_queue_topology q_dl_4g;
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struct rte_acc_queue_topology q_ul_5g;
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struct rte_acc_queue_topology q_dl_5g;
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struct rte_acc_queue_topology q_fft;
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struct rte_acc_queue_topology q_mld;
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/** Arbitration configuration for each operation type */
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struct rte_acc_arbitration arb_ul_4g[RTE_ACC_NUM_VFS];
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struct rte_acc_arbitration arb_dl_4g[RTE_ACC_NUM_VFS];
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struct rte_acc_arbitration arb_ul_5g[RTE_ACC_NUM_VFS];
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struct rte_acc_arbitration arb_dl_5g[RTE_ACC_NUM_VFS];
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struct rte_acc_arbitration arb_fft[RTE_ACC_NUM_VFS];
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struct rte_acc_arbitration arb_mld[RTE_ACC_NUM_VFS];
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_ACC_COMMON_CFG_H_ */
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