c279f187ee
Separate Rx object modification to the Verbs and DevX modules. Signed-off-by: Michael Baum <michaelba@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
453 lines
12 KiB
C
453 lines
12 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2020 Mellanox Technologies, Ltd
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*/
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#include <stddef.h>
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#include <errno.h>
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#include <stdbool.h>
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#include <string.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <inttypes.h>
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#include <sys/queue.h>
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#include "mlx5_autoconf.h"
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#include <rte_mbuf.h>
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#include <rte_malloc.h>
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#include <rte_ethdev_driver.h>
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#include <rte_common.h>
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#include <mlx5_glue.h>
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#include <mlx5_common.h>
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#include <mlx5_common_mr.h>
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#include <mlx5_rxtx.h>
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#include <mlx5_verbs.h>
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#include <mlx5_utils.h>
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#include <mlx5_malloc.h>
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/**
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* Register mr. Given protection domain pointer, pointer to addr and length
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* register the memory region.
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*
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* @param[in] pd
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* Pointer to protection domain context.
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* @param[in] addr
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* Pointer to memory start address.
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* @param[in] length
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* Length of the memory to register.
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* @param[out] pmd_mr
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* pmd_mr struct set with lkey, address, length and pointer to mr object
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*
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* @return
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* 0 on successful registration, -1 otherwise
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*/
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static int
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mlx5_reg_mr(void *pd, void *addr, size_t length,
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struct mlx5_pmd_mr *pmd_mr)
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{
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return mlx5_common_verbs_reg_mr(pd, addr, length, pmd_mr);
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}
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/**
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* Deregister mr. Given the mlx5 pmd MR - deregister the MR
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*
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* @param[in] pmd_mr
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* pmd_mr struct set with lkey, address, length and pointer to mr object
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*
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*/
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static void
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mlx5_dereg_mr(struct mlx5_pmd_mr *pmd_mr)
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{
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mlx5_common_verbs_dereg_mr(pmd_mr);
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}
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/* verbs operations. */
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const struct mlx5_verbs_ops mlx5_verbs_ops = {
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.reg_mr = mlx5_reg_mr,
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.dereg_mr = mlx5_dereg_mr,
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};
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/**
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* Modify Rx WQ vlan stripping offload
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*
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* @param rxq_obj
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* Rx queue object.
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*
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* @return 0 on success, non-0 otherwise
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*/
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static int
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mlx5_rxq_obj_modify_wq_vlan_strip(struct mlx5_rxq_obj *rxq_obj, int on)
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{
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uint16_t vlan_offloads =
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(on ? IBV_WQ_FLAGS_CVLAN_STRIPPING : 0) |
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0;
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struct ibv_wq_attr mod;
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mod = (struct ibv_wq_attr){
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.attr_mask = IBV_WQ_ATTR_FLAGS,
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.flags_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING,
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.flags = vlan_offloads,
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};
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return mlx5_glue->modify_wq(rxq_obj->wq, &mod);
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}
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/**
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* Create a CQ Verbs object.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param idx
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* Queue index in DPDK Rx queue array.
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*
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* @return
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* The Verbs CQ object initialized, NULL otherwise and rte_errno is set.
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*/
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static struct ibv_cq *
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mlx5_rxq_ibv_cq_create(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
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struct mlx5_rxq_ctrl *rxq_ctrl =
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container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
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struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj;
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unsigned int cqe_n = mlx5_rxq_cqe_num(rxq_data);
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struct {
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struct ibv_cq_init_attr_ex ibv;
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struct mlx5dv_cq_init_attr mlx5;
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} cq_attr;
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cq_attr.ibv = (struct ibv_cq_init_attr_ex){
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.cqe = cqe_n,
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.channel = rxq_obj->ibv_channel,
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.comp_mask = 0,
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};
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cq_attr.mlx5 = (struct mlx5dv_cq_init_attr){
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.comp_mask = 0,
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};
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if (priv->config.cqe_comp && !rxq_data->hw_timestamp) {
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cq_attr.mlx5.comp_mask |=
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MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
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#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
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cq_attr.mlx5.cqe_comp_res_format =
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mlx5_rxq_mprq_enabled(rxq_data) ?
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MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
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MLX5DV_CQE_RES_FORMAT_HASH;
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#else
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cq_attr.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
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#endif
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/*
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* For vectorized Rx, it must not be doubled in order to
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* make cq_ci and rq_ci aligned.
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*/
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if (mlx5_rxq_check_vec_support(rxq_data) < 0)
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cq_attr.ibv.cqe *= 2;
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} else if (priv->config.cqe_comp && rxq_data->hw_timestamp) {
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DRV_LOG(DEBUG,
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"Port %u Rx CQE compression is disabled for HW"
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" timestamp.",
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dev->data->port_id);
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}
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#ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
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if (priv->config.cqe_pad) {
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cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
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cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
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}
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#endif
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return mlx5_glue->cq_ex_to_cq(mlx5_glue->dv_create_cq(priv->sh->ctx,
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&cq_attr.ibv,
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&cq_attr.mlx5));
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}
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/**
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* Create a WQ Verbs object.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param idx
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* Queue index in DPDK Rx queue array.
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*
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* @return
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* The Verbs WQ object initialized, NULL otherwise and rte_errno is set.
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*/
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static struct ibv_wq *
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mlx5_rxq_ibv_wq_create(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
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struct mlx5_rxq_ctrl *rxq_ctrl =
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container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
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struct mlx5_rxq_obj *rxq_obj = rxq_ctrl->obj;
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unsigned int wqe_n = 1 << rxq_data->elts_n;
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struct {
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struct ibv_wq_init_attr ibv;
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#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
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struct mlx5dv_wq_init_attr mlx5;
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#endif
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} wq_attr;
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wq_attr.ibv = (struct ibv_wq_init_attr){
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.wq_context = NULL, /* Could be useful in the future. */
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.wq_type = IBV_WQT_RQ,
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/* Max number of outstanding WRs. */
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.max_wr = wqe_n >> rxq_data->sges_n,
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/* Max number of scatter/gather elements in a WR. */
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.max_sge = 1 << rxq_data->sges_n,
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.pd = priv->sh->pd,
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.cq = rxq_obj->ibv_cq,
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.comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0,
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.create_flags = (rxq_data->vlan_strip ?
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IBV_WQ_FLAGS_CVLAN_STRIPPING : 0),
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};
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/* By default, FCS (CRC) is stripped by hardware. */
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if (rxq_data->crc_present) {
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wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
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wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
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}
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if (priv->config.hw_padding) {
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#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
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wq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
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wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
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#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
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wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
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wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
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#endif
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}
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#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
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wq_attr.mlx5 = (struct mlx5dv_wq_init_attr){
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.comp_mask = 0,
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};
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if (mlx5_rxq_mprq_enabled(rxq_data)) {
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struct mlx5dv_striding_rq_init_attr *mprq_attr =
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&wq_attr.mlx5.striding_rq_attrs;
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wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
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*mprq_attr = (struct mlx5dv_striding_rq_init_attr){
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.single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
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.single_wqe_log_num_of_strides = rxq_data->strd_num_n,
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.two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
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};
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}
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rxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,
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&wq_attr.mlx5);
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#else
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rxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);
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#endif
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if (rxq_obj->wq) {
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/*
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* Make sure number of WRs*SGEs match expectations since a queue
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* cannot allocate more than "desc" buffers.
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*/
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if (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
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wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {
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DRV_LOG(ERR,
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"Port %u Rx queue %u requested %u*%u but got"
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" %u*%u WRs*SGEs.",
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dev->data->port_id, idx,
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wqe_n >> rxq_data->sges_n,
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(1 << rxq_data->sges_n),
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wq_attr.ibv.max_wr, wq_attr.ibv.max_sge);
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claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
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rxq_obj->wq = NULL;
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rte_errno = EINVAL;
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}
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}
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return rxq_obj->wq;
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}
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/**
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* Create the Rx queue Verbs object.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @param idx
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* Queue index in DPDK Rx queue array.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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static int
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mlx5_rxq_ibv_obj_new(struct rte_eth_dev *dev, uint16_t idx)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
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struct mlx5_rxq_ctrl *rxq_ctrl =
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container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
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struct ibv_wq_attr mod;
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struct mlx5_rxq_obj *tmpl = rxq_ctrl->obj;
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struct mlx5dv_cq cq_info;
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struct mlx5dv_rwq rwq;
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int ret = 0;
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struct mlx5dv_obj obj;
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MLX5_ASSERT(rxq_data);
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MLX5_ASSERT(tmpl);
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priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_RX_QUEUE;
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priv->verbs_alloc_ctx.obj = rxq_ctrl;
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tmpl->type = MLX5_RXQ_OBJ_TYPE_IBV;
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tmpl->rxq_ctrl = rxq_ctrl;
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if (rxq_ctrl->irq) {
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tmpl->ibv_channel =
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mlx5_glue->create_comp_channel(priv->sh->ctx);
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if (!tmpl->ibv_channel) {
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DRV_LOG(ERR, "Port %u: comp channel creation failure.",
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dev->data->port_id);
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rte_errno = ENOMEM;
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goto error;
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}
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tmpl->fd = ((struct ibv_comp_channel *)(tmpl->ibv_channel))->fd;
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}
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/* Create CQ using Verbs API. */
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tmpl->ibv_cq = mlx5_rxq_ibv_cq_create(dev, idx);
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if (!tmpl->ibv_cq) {
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DRV_LOG(ERR, "Port %u Rx queue %u CQ creation failure.",
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dev->data->port_id, idx);
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rte_errno = ENOMEM;
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goto error;
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}
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obj.cq.in = tmpl->ibv_cq;
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obj.cq.out = &cq_info;
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ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_CQ);
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if (ret) {
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rte_errno = ret;
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goto error;
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}
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if (cq_info.cqe_size != RTE_CACHE_LINE_SIZE) {
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DRV_LOG(ERR,
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"Port %u wrong MLX5_CQE_SIZE environment "
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"variable value: it should be set to %u.",
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dev->data->port_id, RTE_CACHE_LINE_SIZE);
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rte_errno = EINVAL;
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goto error;
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}
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/* Fill the rings. */
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rxq_data->cqe_n = log2above(cq_info.cqe_cnt);
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rxq_data->cq_db = cq_info.dbrec;
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rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
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rxq_data->cq_uar = cq_info.cq_uar;
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rxq_data->cqn = cq_info.cqn;
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/* Create WQ (RQ) using Verbs API. */
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tmpl->wq = mlx5_rxq_ibv_wq_create(dev, idx);
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if (!tmpl->wq) {
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DRV_LOG(ERR, "Port %u Rx queue %u WQ creation failure.",
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dev->data->port_id, idx);
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rte_errno = ENOMEM;
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goto error;
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}
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/* Change queue state to ready. */
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mod = (struct ibv_wq_attr){
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.attr_mask = IBV_WQ_ATTR_STATE,
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.wq_state = IBV_WQS_RDY,
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};
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ret = mlx5_glue->modify_wq(tmpl->wq, &mod);
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if (ret) {
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DRV_LOG(ERR,
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"Port %u Rx queue %u WQ state to IBV_WQS_RDY failed.",
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dev->data->port_id, idx);
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rte_errno = ret;
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goto error;
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}
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obj.rwq.in = tmpl->wq;
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obj.rwq.out = &rwq;
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ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_RWQ);
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if (ret) {
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rte_errno = ret;
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goto error;
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}
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rxq_data->wqes = rwq.buf;
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rxq_data->rq_db = rwq.dbrec;
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rxq_data->cq_arm_sn = 0;
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mlx5_rxq_initialize(rxq_data);
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rxq_data->cq_ci = 0;
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priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
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dev->data->rx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
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rxq_ctrl->wqn = ((struct ibv_wq *)(tmpl->wq))->wq_num;
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return 0;
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error:
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ret = rte_errno; /* Save rte_errno before cleanup. */
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if (tmpl->wq)
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claim_zero(mlx5_glue->destroy_wq(tmpl->wq));
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if (tmpl->ibv_cq)
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claim_zero(mlx5_glue->destroy_cq(tmpl->ibv_cq));
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if (tmpl->ibv_channel)
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claim_zero(mlx5_glue->destroy_comp_channel(tmpl->ibv_channel));
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rte_errno = ret; /* Restore rte_errno. */
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priv->verbs_alloc_ctx.type = MLX5_VERBS_ALLOC_TYPE_NONE;
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return -rte_errno;
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}
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/**
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* Release an Rx verbs queue object.
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*
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* @param rxq_obj
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* Verbs Rx queue object.
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*/
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static void
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mlx5_rxq_ibv_obj_release(struct mlx5_rxq_obj *rxq_obj)
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{
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MLX5_ASSERT(rxq_obj);
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MLX5_ASSERT(rxq_obj->wq);
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MLX5_ASSERT(rxq_obj->ibv_cq);
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claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
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claim_zero(mlx5_glue->destroy_cq(rxq_obj->ibv_cq));
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if (rxq_obj->ibv_channel)
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claim_zero(mlx5_glue->destroy_comp_channel
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(rxq_obj->ibv_channel));
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}
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/**
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* Get event for an Rx verbs queue object.
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*
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* @param rxq_obj
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* Verbs Rx queue object.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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static int
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mlx5_rx_ibv_get_event(struct mlx5_rxq_obj *rxq_obj)
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{
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struct ibv_cq *ev_cq;
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void *ev_ctx;
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int ret = mlx5_glue->get_cq_event(rxq_obj->ibv_channel,
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&ev_cq, &ev_ctx);
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if (ret < 0 || ev_cq != rxq_obj->ibv_cq)
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goto exit;
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mlx5_glue->ack_cq_events(rxq_obj->ibv_cq, 1);
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return 0;
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exit:
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if (ret < 0)
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rte_errno = errno;
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else
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rte_errno = EINVAL;
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return -rte_errno;
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}
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/**
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* Modifies the attributes for the specified WQ.
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*
|
|
* @param rxq_obj
|
|
* Verbs Rx queue object.
|
|
*
|
|
* @return
|
|
* 0 on success, a negative errno value otherwise and rte_errno is set.
|
|
*/
|
|
static int
|
|
mlx5_ibv_modify_wq(struct mlx5_rxq_obj *rxq_obj, bool is_start)
|
|
{
|
|
struct ibv_wq_attr mod = {
|
|
.attr_mask = IBV_WQ_ATTR_STATE,
|
|
.wq_state = is_start ? IBV_WQS_RDY : IBV_WQS_RESET,
|
|
};
|
|
|
|
return mlx5_glue->modify_wq(rxq_obj->wq, &mod);
|
|
}
|
|
|
|
struct mlx5_obj_ops ibv_obj_ops = {
|
|
.rxq_obj_modify_vlan_strip = mlx5_rxq_obj_modify_wq_vlan_strip,
|
|
.rxq_obj_new = mlx5_rxq_ibv_obj_new,
|
|
.rxq_event_get = mlx5_rx_ibv_get_event,
|
|
.rxq_obj_modify = mlx5_ibv_modify_wq,
|
|
.rxq_obj_release = mlx5_rxq_ibv_obj_release,
|
|
};
|