Fiona Trahe c3056d98ae crypto/qat: add lock around CSR access and change logic ...

Add lock around accesses to the arbiter CSR
and use & instead of ^ as ^ not safe if
arb_disable called when already disabled.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>

2018-06-28 01:25:33 +02:00

..

aesni_gcm

cryptodev: rename functions to get session size

2018-05-22 16:36:12 +02:00

aesni_mb

cryptodev: rename functions to get session size

2018-05-22 16:36:12 +02:00

armv8

crypto/armv8: fix HMAC supported digest sizes

2018-05-30 21:31:26 +02:00

ccp

crypto/ccp: add meson build

2018-05-08 22:26:07 +02:00

dpaa2_sec

crypto/dpaa2_sec: remove IOVA conversion for fle address

2018-05-10 17:46:20 +01:00

dpaa_sec

crypto/dpaa_sec: update maximum queue pairs to 8

2018-05-10 17:46:20 +01:00

kasumi

cryptodev: rename functions to get session size

2018-05-22 16:36:12 +02:00

mvsam

crypto/mrvl: rename PMD to mvsam

2018-05-10 17:46:19 +01:00

null

cryptodev: change argument of driver registration

2018-04-23 16:57:55 +01:00

openssl

cryptodev: rename functions to get session size

2018-05-22 16:36:12 +02:00

qat

crypto/qat: add lock around CSR access and change logic

2018-06-28 01:25:33 +02:00

scheduler

crypto/scheduler: fix 64-bit mask of workers cores

2018-05-22 16:36:11 +02:00

snow3g

cryptodev: rename functions to get session size

2018-05-22 16:36:12 +02:00

virtio

crypto/virtio: support HMAC-SHA1

2018-04-23 18:20:10 +01:00

zuc

cryptodev: rename functions to get session size

2018-05-22 16:36:12 +02:00

Makefile

crypto/mrvl: rename PMD to mvsam

2018-05-10 17:46:19 +01:00

meson.build

crypto/ccp: add meson build

2018-05-08 22:26:07 +02:00