df96fd0d73
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are for drivers only and should be a private to DPDK and not installed. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Steven Webster <steven.webster@windriver.com>
504 lines
15 KiB
C
504 lines
15 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Cavium, Inc
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*/
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#ifndef __OCTEONTX_RXTX_H__
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#define __OCTEONTX_RXTX_H__
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#include <ethdev_driver.h>
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#define OFFLOAD_FLAGS \
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uint16_t rx_offload_flags; \
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uint16_t tx_offload_flags
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#define BIT(nr) (1UL << (nr))
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#define OCCTX_RX_OFFLOAD_NONE (0)
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#define OCCTX_RX_MULTI_SEG_F BIT(0)
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#define OCCTX_RX_OFFLOAD_CSUM_F BIT(1)
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#define OCCTX_RX_VLAN_FLTR_F BIT(2)
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#define OCCTX_TX_OFFLOAD_NONE (0)
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#define OCCTX_TX_MULTI_SEG_F BIT(0)
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#define OCCTX_TX_OFFLOAD_L3_L4_CSUM_F BIT(1)
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#define OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F BIT(2)
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#define OCCTX_TX_OFFLOAD_MBUF_NOFF_F BIT(3)
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/* Packet type table */
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#define PTYPE_SIZE OCCTX_PKI_LTYPE_LAST
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/* octeontx send header sub descriptor structure */
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RTE_STD_C11
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union octeontx_send_hdr_w0_u {
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uint64_t u;
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struct {
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uint64_t total : 16;
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uint64_t markptr : 8;
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uint64_t l3ptr : 8;
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uint64_t l4ptr : 8;
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uint64_t ii : 1;
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uint64_t shp_dis : 1;
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uint64_t ckle : 1;
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uint64_t cklf : 2;
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uint64_t ckl3 : 1;
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uint64_t ckl4 : 2;
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uint64_t p : 1;
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uint64_t format : 7;
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uint64_t tstamp : 1;
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uint64_t tso_eom : 1;
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uint64_t df : 1;
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uint64_t tso : 1;
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uint64_t n2 : 1;
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uint64_t scntn1 : 3;
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};
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};
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RTE_STD_C11
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union octeontx_send_hdr_w1_u {
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uint64_t u;
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struct {
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uint64_t tso_mss : 14;
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uint64_t shp_ra : 2;
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uint64_t tso_sb : 8;
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uint64_t leptr : 8;
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uint64_t lfptr : 8;
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uint64_t shp_chg : 9;
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uint64_t tso_fn : 7;
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uint64_t l2len : 8;
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};
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};
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struct octeontx_send_hdr_s {
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union octeontx_send_hdr_w0_u w0;
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union octeontx_send_hdr_w1_u w1;
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};
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static const uint32_t __rte_cache_aligned
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ptype_table[PTYPE_SIZE][PTYPE_SIZE][PTYPE_SIZE] = {
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[LC_NONE][LE_NONE][LF_NONE] = RTE_PTYPE_UNKNOWN,
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[LC_NONE][LE_NONE][LF_IPSEC_ESP] = RTE_PTYPE_UNKNOWN,
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[LC_NONE][LE_NONE][LF_IPFRAG] = RTE_PTYPE_L4_FRAG,
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[LC_NONE][LE_NONE][LF_IPCOMP] = RTE_PTYPE_UNKNOWN,
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[LC_NONE][LE_NONE][LF_TCP] = RTE_PTYPE_L4_TCP,
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[LC_NONE][LE_NONE][LF_UDP] = RTE_PTYPE_L4_UDP,
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[LC_NONE][LE_NONE][LF_GRE] = RTE_PTYPE_TUNNEL_GRE,
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[LC_NONE][LE_NONE][LF_UDP_GENEVE] = RTE_PTYPE_TUNNEL_GENEVE,
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[LC_NONE][LE_NONE][LF_UDP_VXLAN] = RTE_PTYPE_TUNNEL_VXLAN,
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[LC_NONE][LE_NONE][LF_NVGRE] = RTE_PTYPE_TUNNEL_NVGRE,
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[LC_IPV4][LE_NONE][LF_NONE] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_UNKNOWN,
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[LC_IPV4][LE_NONE][LF_IPSEC_ESP] =
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RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L3_IPV4,
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[LC_IPV4][LE_NONE][LF_IPFRAG] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_FRAG,
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[LC_IPV4][LE_NONE][LF_IPCOMP] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_UNKNOWN,
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[LC_IPV4][LE_NONE][LF_TCP] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_TCP,
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[LC_IPV4][LE_NONE][LF_UDP] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L4_UDP,
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[LC_IPV4][LE_NONE][LF_GRE] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_TUNNEL_GRE,
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[LC_IPV4][LE_NONE][LF_UDP_GENEVE] =
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RTE_PTYPE_L3_IPV4 | RTE_PTYPE_TUNNEL_GENEVE,
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[LC_IPV4][LE_NONE][LF_UDP_VXLAN] =
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RTE_PTYPE_L3_IPV4 | RTE_PTYPE_TUNNEL_VXLAN,
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[LC_IPV4][LE_NONE][LF_NVGRE] =
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RTE_PTYPE_L3_IPV4 | RTE_PTYPE_TUNNEL_NVGRE,
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[LC_IPV4_OPT][LE_NONE][LF_NONE] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_UNKNOWN,
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[LC_IPV4_OPT][LE_NONE][LF_IPSEC_ESP] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L3_IPV4,
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[LC_IPV4_OPT][LE_NONE][LF_IPFRAG] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_FRAG,
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[LC_IPV4_OPT][LE_NONE][LF_IPCOMP] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_UNKNOWN,
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[LC_IPV4_OPT][LE_NONE][LF_TCP] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_TCP,
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[LC_IPV4_OPT][LE_NONE][LF_UDP] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_L4_UDP,
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[LC_IPV4_OPT][LE_NONE][LF_GRE] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_TUNNEL_GRE,
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[LC_IPV4_OPT][LE_NONE][LF_UDP_GENEVE] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_TUNNEL_GENEVE,
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[LC_IPV4_OPT][LE_NONE][LF_UDP_VXLAN] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_TUNNEL_VXLAN,
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[LC_IPV4_OPT][LE_NONE][LF_NVGRE] =
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RTE_PTYPE_L3_IPV4_EXT | RTE_PTYPE_TUNNEL_NVGRE,
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[LC_IPV6][LE_NONE][LF_NONE] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_UNKNOWN,
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[LC_IPV6][LE_NONE][LF_IPSEC_ESP] =
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RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L3_IPV4,
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[LC_IPV6][LE_NONE][LF_IPFRAG] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_FRAG,
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[LC_IPV6][LE_NONE][LF_IPCOMP] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_UNKNOWN,
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[LC_IPV6][LE_NONE][LF_TCP] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_TCP,
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[LC_IPV6][LE_NONE][LF_UDP] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_UDP,
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[LC_IPV6][LE_NONE][LF_GRE] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_TUNNEL_GRE,
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[LC_IPV6][LE_NONE][LF_UDP_GENEVE] =
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RTE_PTYPE_L3_IPV6 | RTE_PTYPE_TUNNEL_GENEVE,
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[LC_IPV6][LE_NONE][LF_UDP_VXLAN] =
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RTE_PTYPE_L3_IPV6 | RTE_PTYPE_TUNNEL_VXLAN,
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[LC_IPV6][LE_NONE][LF_NVGRE] =
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RTE_PTYPE_L3_IPV4 | RTE_PTYPE_TUNNEL_NVGRE,
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[LC_IPV6_OPT][LE_NONE][LF_NONE] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_UNKNOWN,
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[LC_IPV6_OPT][LE_NONE][LF_IPSEC_ESP] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L3_IPV4,
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[LC_IPV6_OPT][LE_NONE][LF_IPFRAG] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_FRAG,
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[LC_IPV6_OPT][LE_NONE][LF_IPCOMP] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_UNKNOWN,
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[LC_IPV6_OPT][LE_NONE][LF_TCP] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_TCP,
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[LC_IPV6_OPT][LE_NONE][LF_UDP] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_L4_UDP,
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[LC_IPV6_OPT][LE_NONE][LF_GRE] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_TUNNEL_GRE,
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[LC_IPV6_OPT][LE_NONE][LF_UDP_GENEVE] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_TUNNEL_GENEVE,
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[LC_IPV6_OPT][LE_NONE][LF_UDP_VXLAN] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_TUNNEL_VXLAN,
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[LC_IPV6_OPT][LE_NONE][LF_NVGRE] =
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RTE_PTYPE_L3_IPV6_EXT | RTE_PTYPE_TUNNEL_NVGRE,
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};
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static __rte_always_inline uint64_t
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octeontx_pktmbuf_detach(struct rte_mbuf *m)
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{
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struct rte_mempool *mp = m->pool;
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uint32_t mbuf_size, buf_len;
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struct rte_mbuf *md;
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uint16_t priv_size;
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uint16_t refcount;
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/* Update refcount of direct mbuf */
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md = rte_mbuf_from_indirect(m);
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refcount = rte_mbuf_refcnt_update(md, -1);
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priv_size = rte_pktmbuf_priv_size(mp);
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mbuf_size = (uint32_t)(sizeof(struct rte_mbuf) + priv_size);
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buf_len = rte_pktmbuf_data_room_size(mp);
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m->priv_size = priv_size;
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m->buf_addr = (char *)m + mbuf_size;
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m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size;
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m->buf_len = (uint16_t)buf_len;
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rte_pktmbuf_reset_headroom(m);
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m->data_len = 0;
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m->ol_flags = 0;
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m->next = NULL;
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m->nb_segs = 1;
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/* Now indirect mbuf is safe to free */
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rte_pktmbuf_free(m);
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if (refcount == 0) {
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rte_mbuf_refcnt_set(md, 1);
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md->data_len = 0;
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md->ol_flags = 0;
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md->next = NULL;
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md->nb_segs = 1;
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return 0;
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} else {
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return 1;
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}
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}
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static __rte_always_inline uint64_t
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octeontx_prefree_seg(struct rte_mbuf *m)
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{
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if (likely(rte_mbuf_refcnt_read(m) == 1)) {
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if (!RTE_MBUF_DIRECT(m))
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return octeontx_pktmbuf_detach(m);
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m->next = NULL;
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m->nb_segs = 1;
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return 0;
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} else if (rte_mbuf_refcnt_update(m, -1) == 0) {
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if (!RTE_MBUF_DIRECT(m))
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return octeontx_pktmbuf_detach(m);
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rte_mbuf_refcnt_set(m, 1);
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m->next = NULL;
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m->nb_segs = 1;
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return 0;
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}
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/* Mbuf is having refcount more than 1 so need not to be freed */
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return 1;
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}
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static __rte_always_inline void
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octeontx_tx_checksum_offload(uint64_t *cmd_buf, const uint16_t flags,
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struct rte_mbuf *m)
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{
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struct octeontx_send_hdr_s *send_hdr =
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(struct octeontx_send_hdr_s *)cmd_buf;
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uint64_t ol_flags = m->ol_flags;
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/* PKO Checksum L4 Algorithm Enumeration
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* 0x0 - No checksum
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* 0x1 - UDP L4 checksum
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* 0x2 - TCP L4 checksum
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* 0x3 - SCTP L4 checksum
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*/
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const uint8_t csum = (!(((ol_flags ^ PKT_TX_UDP_CKSUM) >> 52) & 0x3) +
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(!(((ol_flags ^ PKT_TX_TCP_CKSUM) >> 52) & 0x3) * 2) +
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(!(((ol_flags ^ PKT_TX_SCTP_CKSUM) >> 52) & 0x3) * 3));
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const uint8_t is_tunnel_parsed = (!!(ol_flags & PKT_TX_TUNNEL_GTP) ||
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!!(ol_flags & PKT_TX_TUNNEL_VXLAN_GPE) ||
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!!(ol_flags & PKT_TX_TUNNEL_VXLAN) ||
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!!(ol_flags & PKT_TX_TUNNEL_GRE) ||
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!!(ol_flags & PKT_TX_TUNNEL_GENEVE) ||
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!!(ol_flags & PKT_TX_TUNNEL_IP) ||
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!!(ol_flags & PKT_TX_TUNNEL_IPIP));
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const uint8_t csum_outer = (!!(ol_flags & PKT_TX_OUTER_UDP_CKSUM) ||
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!!(ol_flags & PKT_TX_TUNNEL_UDP));
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const uint8_t outer_l2_len = m->outer_l2_len;
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const uint8_t l2_len = m->l2_len;
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if ((flags & OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F) &&
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(flags & OCCTX_TX_OFFLOAD_L3_L4_CSUM_F)) {
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if (is_tunnel_parsed) {
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/* Outer L3 */
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send_hdr->w0.l3ptr = outer_l2_len;
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send_hdr->w0.l4ptr = outer_l2_len + m->outer_l3_len;
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/* Set clk3 for PKO to calculate IPV4 header checksum */
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send_hdr->w0.ckl3 = !!(ol_flags & PKT_TX_OUTER_IPV4);
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/* Outer L4 */
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send_hdr->w0.ckl4 = csum_outer;
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/* Inner L3 */
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send_hdr->w1.leptr = send_hdr->w0.l4ptr + l2_len;
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send_hdr->w1.lfptr = send_hdr->w1.leptr + m->l3_len;
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/* Set clke for PKO to calculate inner IPV4 header
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* checksum.
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*/
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send_hdr->w0.ckle = !!(ol_flags & PKT_TX_IPV4);
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/* Inner L4 */
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send_hdr->w0.cklf = csum;
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} else {
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/* Inner L3 */
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send_hdr->w0.l3ptr = l2_len;
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send_hdr->w0.l4ptr = l2_len + m->l3_len;
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/* Set clk3 for PKO to calculate IPV4 header checksum */
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send_hdr->w0.ckl3 = !!(ol_flags & PKT_TX_IPV4);
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/* Inner L4 */
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send_hdr->w0.ckl4 = csum;
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}
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} else if (flags & OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F) {
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/* Outer L3 */
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send_hdr->w0.l3ptr = outer_l2_len;
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send_hdr->w0.l4ptr = outer_l2_len + m->outer_l3_len;
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/* Set clk3 for PKO to calculate IPV4 header checksum */
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send_hdr->w0.ckl3 = !!(ol_flags & PKT_TX_OUTER_IPV4);
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/* Outer L4 */
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send_hdr->w0.ckl4 = csum_outer;
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} else if (flags & OCCTX_TX_OFFLOAD_L3_L4_CSUM_F) {
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/* Inner L3 */
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send_hdr->w0.l3ptr = l2_len;
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send_hdr->w0.l4ptr = l2_len + m->l3_len;
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/* Set clk3 for PKO to calculate IPV4 header checksum */
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send_hdr->w0.ckl3 = !!(ol_flags & PKT_TX_IPV4);
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/* Inner L4 */
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send_hdr->w0.ckl4 = csum;
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}
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}
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static __rte_always_inline uint16_t
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__octeontx_xmit_prepare(struct rte_mbuf *tx_pkt, uint64_t *cmd_buf,
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const uint16_t flag)
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{
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uint16_t gaura_id, nb_desc = 0;
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/* Setup PKO_SEND_HDR_S */
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cmd_buf[nb_desc++] = tx_pkt->data_len & 0xffff;
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cmd_buf[nb_desc++] = 0x0;
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/* Enable tx checksum offload */
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if ((flag & OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F) ||
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(flag & OCCTX_TX_OFFLOAD_L3_L4_CSUM_F))
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octeontx_tx_checksum_offload(cmd_buf, flag, tx_pkt);
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/* SEND_HDR[DF] bit controls if buffer is to be freed or
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* not, as SG_DESC[I] and SEND_HDR[II] are clear.
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*/
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if (flag & OCCTX_TX_OFFLOAD_MBUF_NOFF_F)
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cmd_buf[0] |= (octeontx_prefree_seg(tx_pkt) <<
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58);
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/* Mark mempool object as "put" since it is freed by PKO */
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if (!(cmd_buf[0] & (1ULL << 58)))
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__mempool_check_cookies(tx_pkt->pool, (void **)&tx_pkt,
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1, 0);
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/* Get the gaura Id */
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gaura_id = octeontx_fpa_bufpool_gaura((uintptr_t)tx_pkt->pool->pool_id);
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/* Setup PKO_SEND_BUFLINK_S */
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cmd_buf[nb_desc++] = PKO_SEND_BUFLINK_SUBDC |
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PKO_SEND_BUFLINK_LDTYPE(0x1ull) |
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PKO_SEND_BUFLINK_GAUAR((long)gaura_id) |
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tx_pkt->data_len;
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cmd_buf[nb_desc++] = rte_mbuf_data_iova(tx_pkt);
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return nb_desc;
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}
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static __rte_always_inline uint16_t
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__octeontx_xmit_mseg_prepare(struct rte_mbuf *tx_pkt, uint64_t *cmd_buf,
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const uint16_t flag)
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{
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uint16_t nb_segs, nb_desc = 0;
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uint16_t gaura_id, len = 0;
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struct rte_mbuf *m_next = NULL;
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nb_segs = tx_pkt->nb_segs;
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/* Setup PKO_SEND_HDR_S */
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cmd_buf[nb_desc++] = tx_pkt->pkt_len & 0xffff;
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cmd_buf[nb_desc++] = 0x0;
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/* Enable tx checksum offload */
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if ((flag & OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F) ||
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(flag & OCCTX_TX_OFFLOAD_L3_L4_CSUM_F))
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|
octeontx_tx_checksum_offload(cmd_buf, flag, tx_pkt);
|
|
|
|
do {
|
|
m_next = tx_pkt->next;
|
|
/* To handle case where mbufs belong to diff pools, like
|
|
* fragmentation
|
|
*/
|
|
gaura_id = octeontx_fpa_bufpool_gaura((uintptr_t)
|
|
tx_pkt->pool->pool_id);
|
|
|
|
/* Setup PKO_SEND_GATHER_S */
|
|
cmd_buf[nb_desc] = PKO_SEND_GATHER_SUBDC |
|
|
PKO_SEND_GATHER_LDTYPE(0x1ull) |
|
|
PKO_SEND_GATHER_GAUAR((long)gaura_id) |
|
|
tx_pkt->data_len;
|
|
|
|
/* SG_DESC[I] bit controls if buffer is to be freed or
|
|
* not, as SEND_HDR[DF] and SEND_HDR[II] are clear.
|
|
*/
|
|
if (flag & OCCTX_TX_OFFLOAD_MBUF_NOFF_F) {
|
|
cmd_buf[nb_desc] |=
|
|
(octeontx_prefree_seg(tx_pkt) << 57);
|
|
}
|
|
|
|
/* Mark mempool object as "put" since it is freed by
|
|
* PKO.
|
|
*/
|
|
if (!(cmd_buf[nb_desc] & (1ULL << 57))) {
|
|
tx_pkt->next = NULL;
|
|
__mempool_check_cookies(tx_pkt->pool,
|
|
(void **)&tx_pkt, 1, 0);
|
|
}
|
|
nb_desc++;
|
|
|
|
cmd_buf[nb_desc++] = rte_mbuf_data_iova(tx_pkt);
|
|
|
|
nb_segs--;
|
|
len += tx_pkt->data_len;
|
|
tx_pkt = m_next;
|
|
} while (nb_segs);
|
|
|
|
return nb_desc;
|
|
}
|
|
|
|
static __rte_always_inline uint16_t
|
|
__octeontx_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
|
|
uint16_t nb_pkts, uint64_t *cmd_buf,
|
|
const uint16_t flags)
|
|
{
|
|
struct octeontx_txq *txq = tx_queue;
|
|
octeontx_dq_t *dq = &txq->dq;
|
|
uint16_t count = 0, nb_desc;
|
|
rte_io_wmb();
|
|
|
|
while (count < nb_pkts) {
|
|
if (unlikely(*((volatile int64_t *)dq->fc_status_va) < 0))
|
|
break;
|
|
|
|
if (flags & OCCTX_TX_MULTI_SEG_F) {
|
|
nb_desc = __octeontx_xmit_mseg_prepare(tx_pkts[count],
|
|
cmd_buf, flags);
|
|
} else {
|
|
nb_desc = __octeontx_xmit_prepare(tx_pkts[count],
|
|
cmd_buf, flags);
|
|
}
|
|
|
|
octeontx_reg_lmtst(dq->lmtline_va, dq->ioreg_va, cmd_buf,
|
|
nb_desc);
|
|
|
|
count++;
|
|
}
|
|
return count;
|
|
}
|
|
|
|
uint16_t
|
|
octeontx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
|
|
|
|
#define L3L4CSUM_F OCCTX_TX_OFFLOAD_L3_L4_CSUM_F
|
|
#define OL3OL4CSUM_F OCCTX_TX_OFFLOAD_OL3_OL4_CSUM_F
|
|
#define NOFF_F OCCTX_TX_OFFLOAD_MBUF_NOFF_F
|
|
#define MULT_F OCCTX_TX_MULTI_SEG_F
|
|
|
|
/* [L3L4CSUM_F] [OL3OL4CSUM_F] [NOFF] [MULTI_SEG] */
|
|
#define OCCTX_TX_FASTPATH_MODES \
|
|
T(no_offload, 0, 0, 0, 0, 4, \
|
|
OCCTX_TX_OFFLOAD_NONE) \
|
|
T(mseg, 0, 0, 0, 1, 14, \
|
|
MULT_F) \
|
|
T(l3l4csum, 0, 0, 1, 0, 4, \
|
|
L3L4CSUM_F) \
|
|
T(l3l4csum_mseg, 0, 0, 1, 1, 14, \
|
|
L3L4CSUM_F | MULT_F) \
|
|
T(ol3ol4csum, 0, 1, 0, 0, 4, \
|
|
OL3OL4CSUM_F) \
|
|
T(ol3l4csum_mseg, 0, 1, 0, 1, 14, \
|
|
OL3OL4CSUM_F | MULT_F) \
|
|
T(ol3l4csum_l3l4csum, 0, 1, 1, 0, 4, \
|
|
OL3OL4CSUM_F | L3L4CSUM_F) \
|
|
T(ol3l4csum_l3l4csum_mseg, 0, 1, 1, 1, 14, \
|
|
OL3OL4CSUM_F | L3L4CSUM_F | MULT_F) \
|
|
T(noff, 1, 0, 0, 0, 4, \
|
|
NOFF_F) \
|
|
T(noff_mseg, 1, 0, 0, 1, 14, \
|
|
NOFF_F | MULT_F) \
|
|
T(noff_l3l4csum, 1, 0, 1, 0, 4, \
|
|
NOFF_F | L3L4CSUM_F) \
|
|
T(noff_l3l4csum_mseg, 1, 0, 1, 1, 14, \
|
|
NOFF_F | L3L4CSUM_F | MULT_F) \
|
|
T(noff_ol3ol4csum, 1, 1, 0, 0, 4, \
|
|
NOFF_F | OL3OL4CSUM_F) \
|
|
T(noff_ol3ol4csum_mseg, 1, 1, 0, 1, 14, \
|
|
NOFF_F | OL3OL4CSUM_F | MULT_F) \
|
|
T(noff_ol3ol4csum_l3l4csum, 1, 1, 1, 0, 4, \
|
|
NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F) \
|
|
T(noff_ol3ol4csum_l3l4csum_mseg, 1, 1, 1, 1, 14, \
|
|
NOFF_F | OL3OL4CSUM_F | L3L4CSUM_F | \
|
|
MULT_F)
|
|
|
|
/* RX offload macros */
|
|
#define VLAN_FLTR_F OCCTX_RX_VLAN_FLTR_F
|
|
#define CSUM_F OCCTX_RX_OFFLOAD_CSUM_F
|
|
#define MULT_RX_F OCCTX_RX_MULTI_SEG_F
|
|
|
|
/* [VLAN_FLTR] [CSUM_F] [MULTI_SEG] */
|
|
#define OCCTX_RX_FASTPATH_MODES \
|
|
R(no_offload, 0, 0, 0, OCCTX_RX_OFFLOAD_NONE) \
|
|
R(mseg, 0, 0, 1, MULT_RX_F) \
|
|
R(csum, 0, 1, 0, CSUM_F) \
|
|
R(csum_mseg, 0, 1, 1, CSUM_F | MULT_RX_F) \
|
|
R(vlan, 1, 0, 0, VLAN_FLTR_F) \
|
|
R(vlan_mseg, 1, 0, 1, VLAN_FLTR_F | MULT_RX_F) \
|
|
R(vlan_csum, 1, 1, 0, VLAN_FLTR_F | CSUM_F) \
|
|
R(vlan_csum_mseg, 1, 1, 1, CSUM_F | VLAN_FLTR_F | \
|
|
MULT_RX_F)
|
|
|
|
#endif /* __OCTEONTX_RXTX_H__ */
|