9792848c65
Fix crc32c hash functions to return a valid crc32c value for
data lengths not multiple of 4 bytes.
ARM code is not tested.
Fixes: af75078fec ("first public release")
Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
Acked-by: David Marchand <david.marchand@6wind.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
216 lines
5.5 KiB
C
216 lines
5.5 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2015 Cavium networks. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Cavium networks nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_CRC_ARM64_H_
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#define _RTE_CRC_ARM64_H_
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/**
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* @file
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*
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* RTE CRC arm64 Hash
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <rte_cpuflags.h>
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#include <rte_branch_prediction.h>
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#include <rte_common.h>
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static inline uint32_t
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crc32c_arm64_u8(uint8_t data, uint32_t init_val)
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{
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asm(".arch armv8-a+crc");
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__asm__ volatile(
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"crc32cb %w[crc], %w[crc], %w[value]"
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: [crc] "+r" (init_val)
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: [value] "r" (data));
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return init_val;
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}
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static inline uint32_t
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crc32c_arm64_u16(uint16_t data, uint32_t init_val)
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{
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asm(".arch armv8-a+crc");
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__asm__ volatile(
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"crc32ch %w[crc], %w[crc], %w[value]"
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: [crc] "+r" (init_val)
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: [value] "r" (data));
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return init_val;
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}
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static inline uint32_t
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crc32c_arm64_u32(uint32_t data, uint32_t init_val)
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{
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asm(".arch armv8-a+crc");
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__asm__ volatile(
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"crc32cw %w[crc], %w[crc], %w[value]"
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: [crc] "+r" (init_val)
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: [value] "r" (data));
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return init_val;
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}
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static inline uint32_t
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crc32c_arm64_u64(uint64_t data, uint32_t init_val)
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{
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asm(".arch armv8-a+crc");
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__asm__ volatile(
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"crc32cx %w[crc], %w[crc], %x[value]"
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: [crc] "+r" (init_val)
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: [value] "r" (data));
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return init_val;
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}
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/**
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* Allow or disallow use of arm64 SIMD instrinsics for CRC32 hash
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* calculation.
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*
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* @param alg
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* An OR of following flags:
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* - (CRC32_SW) Don't use arm64 crc intrinsics
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* - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available
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*
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*/
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static inline void
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rte_hash_crc_set_alg(uint8_t alg)
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{
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switch (alg) {
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case CRC32_ARM64:
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if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))
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alg = CRC32_SW;
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case CRC32_SW:
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crc32_alg = alg;
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default:
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break;
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}
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}
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/* Setting the best available algorithm */
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static inline void __attribute__((constructor))
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rte_hash_crc_init_alg(void)
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{
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rte_hash_crc_set_alg(CRC32_ARM64);
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}
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/**
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* Use single crc32 instruction to perform a hash on a 1 byte value.
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* Fall back to software crc32 implementation in case arm64 crc intrinsics is
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* not supported
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*
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* @param data
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* Data to perform hash on.
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* @param init_val
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* Value to initialise hash generator.
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* @return
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* 32bit calculated hash value.
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*/
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static inline uint32_t
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rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
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{
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if (likely(crc32_alg & CRC32_ARM64))
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return crc32c_arm64_u8(data, init_val);
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return crc32c_1byte(data, init_val);
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}
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/**
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* Use single crc32 instruction to perform a hash on a 2 bytes value.
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* Fall back to software crc32 implementation in case arm64 crc intrinsics is
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* not supported
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*
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* @param data
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* Data to perform hash on.
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* @param init_val
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* Value to initialise hash generator.
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* @return
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* 32bit calculated hash value.
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*/
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static inline uint32_t
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rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
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{
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if (likely(crc32_alg & CRC32_ARM64))
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return crc32c_arm64_u16(data, init_val);
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return crc32c_2bytes(data, init_val);
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}
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/**
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* Use single crc32 instruction to perform a hash on a 4 byte value.
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* Fall back to software crc32 implementation in case arm64 crc intrinsics is
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* not supported
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*
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* @param data
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* Data to perform hash on.
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* @param init_val
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* Value to initialise hash generator.
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* @return
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* 32bit calculated hash value.
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*/
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static inline uint32_t
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rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
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{
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if (likely(crc32_alg & CRC32_ARM64))
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return crc32c_arm64_u32(data, init_val);
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return crc32c_1word(data, init_val);
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}
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/**
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* Use single crc32 instruction to perform a hash on a 8 byte value.
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* Fall back to software crc32 implementation in case arm64 crc intrinsics is
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* not supported
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*
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* @param data
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* Data to perform hash on.
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* @param init_val
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* Value to initialise hash generator.
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* @return
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* 32bit calculated hash value.
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*/
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static inline uint32_t
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rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
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{
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if (likely(crc32_alg == CRC32_ARM64))
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return crc32c_arm64_u64(data, init_val);
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return crc32c_2words(data, init_val);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_CRC_ARM64_H_ */
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