4ac9ad07bd
This patch separates Tx burst function implementations to different source files, thus allowing them to compile in parallel. Signed-off-by: Michael Baum <michaelba@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
35 lines
988 B
C
35 lines
988 B
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2021 6WIND S.A.
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* Copyright 2021 Mellanox Technologies, Ltd
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*/
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#include "mlx5_tx.h"
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/*
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* Generate routines with Legacy Multi-Packet Write support.
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* This mode is supported by ConnectX-4 Lx only and imposes
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* offload limitations, not supported:
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* - ACL/Flows (metadata are becoming meaningless)
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* - WQE Inline headers
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* - SRIOV (E-Switch offloads)
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* - VLAN insertion
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* - tunnel encapsulation/decapsulation
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* - TSO
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*/
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MLX5_TXOFF_DECL(none_mpw,
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MLX5_TXOFF_CONFIG_NONE | MLX5_TXOFF_CONFIG_EMPW |
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MLX5_TXOFF_CONFIG_MPW)
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MLX5_TXOFF_DECL(mci_mpw,
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MLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_CSUM |
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MLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_EMPW |
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MLX5_TXOFF_CONFIG_MPW)
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MLX5_TXOFF_DECL(mc_mpw,
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MLX5_TXOFF_CONFIG_MULTI | MLX5_TXOFF_CONFIG_CSUM |
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MLX5_TXOFF_CONFIG_EMPW | MLX5_TXOFF_CONFIG_MPW)
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MLX5_TXOFF_DECL(i_mpw,
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MLX5_TXOFF_CONFIG_INLINE | MLX5_TXOFF_CONFIG_EMPW |
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MLX5_TXOFF_CONFIG_MPW)
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