numam-dpdk/drivers/net/mlx5/mlx5_defs.h
Nelio Laranjeiro 95e16ef325 mlx5: adapt indirection table size depending on Rx queues number
Use the maximum size of the indirection table when the number of requested
RX queues is not a power of two, this help to improve RSS balancing.

A message informs users that balancing is not optimal in such cases.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2015-10-31 00:21:58 +01:00

82 lines
2.9 KiB
C

/*-
* BSD LICENSE
*
* Copyright 2015 6WIND S.A.
* Copyright 2015 Mellanox.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
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* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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*/
#ifndef RTE_PMD_MLX5_DEFS_H_
#define RTE_PMD_MLX5_DEFS_H_
/* Reported driver name. */
#define MLX5_DRIVER_NAME "librte_pmd_mlx5"
/* Maximum number of simultaneous MAC addresses. */
#define MLX5_MAX_MAC_ADDRESSES 128
/* Maximum number of simultaneous VLAN filters. */
#define MLX5_MAX_VLAN_IDS 128
/* Request send completion once in every 64 sends, might be less. */
#define MLX5_PMD_TX_PER_COMP_REQ 64
/* RSS Indirection table size. */
#define RSS_INDIRECTION_TABLE_SIZE 128
/* Maximum number of Scatter/Gather Elements per Work Request. */
#ifndef MLX5_PMD_SGE_WR_N
#define MLX5_PMD_SGE_WR_N 4
#endif
/* Maximum size for inline data. */
#ifndef MLX5_PMD_MAX_INLINE
#define MLX5_PMD_MAX_INLINE 0
#endif
/*
* Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
* from which buffers are to be transmitted will have to be mapped by this
* driver to their own Memory Region (MR). This is a slow operation.
*
* This value is always 1 for RX queues.
*/
#ifndef MLX5_PMD_TX_MP_CACHE
#define MLX5_PMD_TX_MP_CACHE 8
#endif
/*
* If defined, only use software counters. The PMD will never ask the hardware
* for these, and many of them won't be available.
*/
#ifndef MLX5_PMD_SOFT_COUNTERS
#define MLX5_PMD_SOFT_COUNTERS 1
#endif
#endif /* RTE_PMD_MLX5_DEFS_H_ */