87a3ae3e1e
Query firmware for max Tx and Rx queues that can be allocated. Move the code to determine max queues to common place for both PF and VF. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
69 lines
2.8 KiB
C
69 lines
2.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2014-2018 Chelsio Communications.
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* All rights reserved.
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*/
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#ifndef _CXGBE_H_
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#define _CXGBE_H_
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#include "common.h"
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#include "t4_regs.h"
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#define CXGBE_MIN_RING_DESC_SIZE 128 /* Min TX/RX descriptor ring size */
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#define CXGBE_MAX_RING_DESC_SIZE 4096 /* Max TX/RX descriptor ring size */
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#define CXGBE_DEFAULT_TX_DESC_SIZE 1024 /* Default TX ring size */
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#define CXGBE_DEFAULT_RX_DESC_SIZE 1024 /* Default RX ring size */
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#define CXGBE_MIN_RX_BUFSIZE ETHER_MIN_MTU /* min buf size */
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#define CXGBE_MAX_RX_PKTLEN (9000 + ETHER_HDR_LEN + ETHER_CRC_LEN) /* max pkt */
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/* Max poll time is 100 * 100msec = 10 sec */
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#define CXGBE_LINK_STATUS_POLL_MS 100 /* 100ms */
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#define CXGBE_LINK_STATUS_POLL_CNT 100 /* Max number of times to poll */
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#define CXGBE_DEFAULT_RSS_KEY_LEN 40 /* 320-bits */
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#define CXGBE_RSS_HF_IPV4_MASK (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | \
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ETH_RSS_NONFRAG_IPV4_OTHER)
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#define CXGBE_RSS_HF_IPV6_MASK (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | \
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ETH_RSS_NONFRAG_IPV6_OTHER | \
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ETH_RSS_IPV6_EX)
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#define CXGBE_RSS_HF_TCP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_TCP | \
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ETH_RSS_IPV6_TCP_EX)
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#define CXGBE_RSS_HF_UDP_IPV6_MASK (ETH_RSS_NONFRAG_IPV6_UDP | \
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ETH_RSS_IPV6_UDP_EX)
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#define CXGBE_RSS_HF_ALL (ETH_RSS_IP | ETH_RSS_TCP | ETH_RSS_UDP)
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#define CXGBE_DEVARG_KEEP_OVLAN "keep_ovlan"
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#define CXGBE_DEVARG_FORCE_LINK_UP "force_link_up"
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bool force_linkup(struct adapter *adap);
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int cxgbe_probe(struct adapter *adapter);
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int cxgbevf_probe(struct adapter *adapter);
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void cxgbe_get_speed_caps(struct port_info *pi, u32 *speed_caps);
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int cxgbe_set_link_status(struct port_info *pi, bool status);
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int cxgbe_up(struct adapter *adap);
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int cxgbe_down(struct port_info *pi);
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void cxgbe_close(struct adapter *adapter);
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void cxgbe_stats_get(struct port_info *pi, struct port_stats *stats);
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void cxgbevf_stats_get(struct port_info *pi, struct port_stats *stats);
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void cxgbe_stats_reset(struct port_info *pi);
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int cxgbe_poll_for_completion(struct sge_rspq *q, unsigned int us,
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unsigned int cnt, struct t4_completion *c);
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int link_start(struct port_info *pi);
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void init_rspq(struct adapter *adap, struct sge_rspq *q, unsigned int us,
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unsigned int cnt, unsigned int size, unsigned int iqe_size);
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int setup_sge_fwevtq(struct adapter *adapter);
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int setup_sge_ctrl_txq(struct adapter *adapter);
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void cfg_queues(struct rte_eth_dev *eth_dev);
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int cfg_queue_count(struct rte_eth_dev *eth_dev);
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int init_rss(struct adapter *adap);
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int setup_rss(struct port_info *pi);
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void cxgbe_enable_rx_queues(struct port_info *pi);
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void print_port_info(struct adapter *adap);
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void print_adapter_info(struct adapter *adap);
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int cxgbe_get_devargs(struct rte_devargs *devargs, const char *key);
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void configure_max_ethqsets(struct adapter *adapter);
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#endif /* _CXGBE_H_ */
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