06cffd468f
Currently, ACPI and PSTATE modes have lots of code duplication, confusing logic, and a bunch of other issues that can, and have, led to various bugs and resource leaks. This commit factors out the common parts of sysfs reading/writing for ACPI and PSTATE drivers. Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Signed-off-by: David Hunt <david.hunt@intel.com>
854 lines
20 KiB
C
854 lines
20 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#include <stdio.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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#include <signal.h>
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#include <limits.h>
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#include <errno.h>
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#include <inttypes.h>
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#include <rte_memcpy.h>
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#include <rte_memory.h>
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#include <rte_string_fns.h>
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#include "power_pstate_cpufreq.h"
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#include "power_common.h"
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/* macros used for rounding frequency to nearest 100000 */
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#define FREQ_ROUNDING_DELTA 50000
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#define ROUND_FREQ_TO_N_100000 100000
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#define BUS_FREQ 100000
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#define POWER_GOVERNOR_PERF "performance"
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#define POWER_SYSFILE_MAX_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
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#define POWER_SYSFILE_MIN_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
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#define POWER_SYSFILE_CUR_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_cur_freq"
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#define POWER_SYSFILE_BASE_MAX_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
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#define POWER_SYSFILE_BASE_MIN_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_min_freq"
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#define POWER_SYSFILE_BASE_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/base_frequency"
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#define POWER_PSTATE_DRIVER "intel_pstate"
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#define POWER_MSR_PATH "/dev/cpu/%u/msr"
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/*
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* MSR related
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*/
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#define PLATFORM_INFO 0x0CE
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#define NON_TURBO_MASK 0xFF00
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#define NON_TURBO_OFFSET 0x8
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enum power_state {
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POWER_IDLE = 0,
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POWER_ONGOING,
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POWER_USED,
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POWER_UNKNOWN
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};
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struct pstate_power_info {
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unsigned int lcore_id; /**< Logical core id */
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uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
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uint32_t nb_freqs; /**< number of available freqs */
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FILE *f_cur_min; /**< FD of scaling_min */
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FILE *f_cur_max; /**< FD of scaling_max */
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char governor_ori[32]; /**< Original governor name */
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uint32_t curr_idx; /**< Freq index in freqs array */
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uint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */
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uint32_t sys_max_freq; /**< system wide max freq */
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uint32_t core_base_freq; /**< core base freq */
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uint32_t state; /**< Power in use state */
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uint16_t turbo_available; /**< Turbo Boost available */
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uint16_t turbo_enable; /**< Turbo Boost enable/disable */
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uint16_t priority_core; /**< High Performance core */
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} __rte_cache_aligned;
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static struct pstate_power_info lcore_power_info[RTE_MAX_LCORE];
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/**
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* It is to read the specific MSR.
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*/
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static int32_t
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power_rdmsr(int msr, uint64_t *val, unsigned int lcore_id)
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{
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int fd, ret;
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char fullpath[PATH_MAX];
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snprintf(fullpath, sizeof(fullpath), POWER_MSR_PATH, lcore_id);
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fd = open(fullpath, O_RDONLY);
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if (fd < 0) {
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RTE_LOG(ERR, POWER, "Error opening '%s': %s\n", fullpath,
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strerror(errno));
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return fd;
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}
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ret = pread(fd, val, sizeof(uint64_t), msr);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Error reading '%s': %s\n", fullpath,
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strerror(errno));
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goto out;
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}
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POWER_DEBUG_TRACE("MSR Path %s, offset 0x%X for lcore %u\n",
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fullpath, msr, lcore_id);
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POWER_DEBUG_TRACE("Ret value %d, content is 0x%"PRIx64"\n", ret, *val);
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out: close(fd);
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return ret;
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}
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/**
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* It is to fopen the sys file for the future setting the lcore frequency.
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*/
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static int
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power_init_for_setting_freq(struct pstate_power_info *pi)
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{
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FILE *f_base = NULL, *f_base_max = NULL, *f_min = NULL, *f_max = NULL;
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uint32_t base_ratio, base_max_ratio;
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uint64_t max_non_turbo;
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int ret;
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/* open all files we expect to have open */
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open_core_sysfs_file(&f_base_max, "r", POWER_SYSFILE_BASE_MAX_FREQ,
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pi->lcore_id);
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if (f_base_max == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_BASE_MAX_FREQ);
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goto err;
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}
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open_core_sysfs_file(&f_min, "rw+", POWER_SYSFILE_MIN_FREQ,
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pi->lcore_id);
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if (f_min == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_MIN_FREQ);
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goto err;
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}
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open_core_sysfs_file(&f_max, "rw+", POWER_SYSFILE_MAX_FREQ,
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pi->lcore_id);
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if (f_max == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_MAX_FREQ);
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goto err;
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}
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open_core_sysfs_file(&f_base, "r", POWER_SYSFILE_BASE_FREQ,
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pi->lcore_id);
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/* base ratio file may not exist in some kernels, so no error check */
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/* read base max ratio */
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ret = read_core_sysfs_u32(f_base_max, &base_max_ratio);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_BASE_MAX_FREQ);
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goto err;
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}
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/* base ratio may not exist */
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if (f_base != NULL) {
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ret = read_core_sysfs_u32(f_base, &base_ratio);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_BASE_FREQ);
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goto err;
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}
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} else {
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base_ratio = 0;
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}
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/* Add MSR read to detect turbo status */
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if (power_rdmsr(PLATFORM_INFO, &max_non_turbo, pi->lcore_id) < 0)
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goto err;
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/* no errors after this point */
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/* convert ratios to bins */
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base_max_ratio /= BUS_FREQ;
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base_ratio /= BUS_FREQ;
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/* assign file handles */
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pi->f_cur_min = f_min;
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pi->f_cur_max = f_max;
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max_non_turbo = (max_non_turbo&NON_TURBO_MASK)>>NON_TURBO_OFFSET;
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POWER_DEBUG_TRACE("no turbo perf %"PRIu64"\n", max_non_turbo);
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pi->non_turbo_max_ratio = (uint32_t)max_non_turbo;
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/*
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* If base_frequency is reported as greater than the maximum
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* turbo frequency, that's a known issue with some kernels.
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* Set base_frequency to max_non_turbo as a workaround.
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*/
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if (base_ratio > base_max_ratio) {
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/* base_ratio is greater than max turbo. Kernel bug. */
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pi->priority_core = 0;
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goto out;
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}
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/*
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* If base_frequency is reported as greater than the maximum
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* non-turbo frequency, then mark it as a high priority core.
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*/
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if (base_ratio > max_non_turbo)
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pi->priority_core = 1;
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else
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pi->priority_core = 0;
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pi->core_base_freq = base_ratio * BUS_FREQ;
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out:
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if (f_base != NULL)
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fclose(f_base);
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fclose(f_base_max);
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/* f_min and f_max are stored, no need to close */
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return 0;
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err:
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if (f_base != NULL)
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fclose(f_base);
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if (f_base_max != NULL)
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fclose(f_base_max);
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if (f_min != NULL)
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fclose(f_min);
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if (f_max != NULL)
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fclose(f_max);
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return -1;
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}
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static int
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set_freq_internal(struct pstate_power_info *pi, uint32_t idx)
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{
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uint32_t target_freq = 0;
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if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
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RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
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"should be less than %u\n", idx, pi->nb_freqs);
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return -1;
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}
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/* Check if it is the same as current */
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if (idx == pi->curr_idx)
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return 0;
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/* Because Intel Pstate Driver only allow user change min/max hint
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* User need change the min/max as same value.
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*/
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if (fseek(pi->f_cur_min, 0, SEEK_SET) < 0) {
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RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
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"for setting frequency for lcore %u\n",
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pi->lcore_id);
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return -1;
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}
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if (fseek(pi->f_cur_max, 0, SEEK_SET) < 0) {
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RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
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"for setting frequency for lcore %u\n",
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pi->lcore_id);
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return -1;
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}
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/* Turbo is available and enabled, first freq bucket is sys max freq */
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if (pi->turbo_available && idx == 0) {
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if (pi->turbo_enable)
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target_freq = pi->sys_max_freq;
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else {
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RTE_LOG(ERR, POWER, "Turbo is off, frequency can't be scaled up more %u\n",
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pi->lcore_id);
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return -1;
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}
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} else
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target_freq = pi->freqs[idx];
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/* Decrease freq, the min freq should be updated first */
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if (idx > pi->curr_idx) {
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if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
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RTE_LOG(ERR, POWER, "Fail to write new frequency for "
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"lcore %u\n", pi->lcore_id);
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return -1;
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}
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if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
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RTE_LOG(ERR, POWER, "Fail to write new frequency for "
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"lcore %u\n", pi->lcore_id);
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return -1;
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}
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POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
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target_freq, pi->lcore_id);
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fflush(pi->f_cur_min);
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fflush(pi->f_cur_max);
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}
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/* Increase freq, the max freq should be updated first */
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if (idx < pi->curr_idx) {
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if (fprintf(pi->f_cur_max, "%u", target_freq) < 0) {
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RTE_LOG(ERR, POWER, "Fail to write new frequency for "
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"lcore %u\n", pi->lcore_id);
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return -1;
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}
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if (fprintf(pi->f_cur_min, "%u", target_freq) < 0) {
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RTE_LOG(ERR, POWER, "Fail to write new frequency for "
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"lcore %u\n", pi->lcore_id);
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return -1;
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}
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POWER_DEBUG_TRACE("Frequency '%u' to be set for lcore %u\n",
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target_freq, pi->lcore_id);
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fflush(pi->f_cur_max);
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fflush(pi->f_cur_min);
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}
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pi->curr_idx = idx;
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return 1;
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}
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/**
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* It is to check the current scaling governor by reading sys file, and then
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* set it into 'performance' if it is not by writing the sys file. The original
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* governor will be saved for rolling back.
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*/
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static int
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power_set_governor_performance(struct pstate_power_info *pi)
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{
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return power_set_governor(pi->lcore_id, POWER_GOVERNOR_PERF,
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pi->governor_ori, sizeof(pi->governor_ori));
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}
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/**
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* It is to check the governor and then set the original governor back if
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* needed by writing the sys file.
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*/
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static int
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power_set_governor_original(struct pstate_power_info *pi)
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{
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return power_set_governor(pi->lcore_id, pi->governor_ori, NULL, 0);
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}
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/**
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* It is to get the available frequencies of the specific lcore by reading the
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* sys file.
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*/
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static int
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power_get_available_freqs(struct pstate_power_info *pi)
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{
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FILE *f_min = NULL, *f_max = NULL;
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int ret = -1;
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uint32_t sys_min_freq = 0, sys_max_freq = 0, base_max_freq = 0;
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uint32_t i, num_freqs = 0;
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/* open all files */
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open_core_sysfs_file(&f_max, "r", POWER_SYSFILE_BASE_MAX_FREQ,
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pi->lcore_id);
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if (f_max == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_BASE_MAX_FREQ);
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goto out;
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}
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open_core_sysfs_file(&f_min, "r", POWER_SYSFILE_BASE_MIN_FREQ,
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pi->lcore_id);
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if (f_min == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_BASE_MIN_FREQ);
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goto out;
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}
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/* read base ratios */
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ret = read_core_sysfs_u32(f_max, &sys_max_freq);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_BASE_MAX_FREQ);
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goto out;
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}
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ret = read_core_sysfs_u32(f_min, &sys_min_freq);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_BASE_MIN_FREQ);
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goto out;
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}
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if (sys_max_freq < sys_min_freq)
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goto out;
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pi->sys_max_freq = sys_max_freq;
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if (pi->priority_core == 1)
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base_max_freq = pi->core_base_freq;
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else
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base_max_freq = pi->non_turbo_max_ratio * BUS_FREQ;
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POWER_DEBUG_TRACE("sys min %u, sys max %u, base_max %u\n",
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sys_min_freq,
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sys_max_freq,
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base_max_freq);
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if (base_max_freq < sys_max_freq)
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pi->turbo_available = 1;
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else
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pi->turbo_available = 0;
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/* If turbo is available then there is one extra freq bucket
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* to store the sys max freq which value is base_max +1
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*/
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num_freqs = (base_max_freq - sys_min_freq) / BUS_FREQ + 1 +
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pi->turbo_available;
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/* Generate the freq bucket array.
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* If turbo is available the freq bucket[0] value is base_max +1
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* the bucket[1] is base_max, bucket[2] is base_max - BUS_FREQ
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* and so on.
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* If turbo is not available bucket[0] is base_max and so on
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*/
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for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
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if ((i == 0) && pi->turbo_available)
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pi->freqs[pi->nb_freqs++] = base_max_freq + 1;
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else
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pi->freqs[pi->nb_freqs++] =
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base_max_freq - (i - pi->turbo_available) * BUS_FREQ;
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}
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ret = 0;
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POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
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num_freqs, pi->lcore_id);
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out:
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fclose(f_min);
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fclose(f_max);
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return ret;
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}
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static int
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power_get_cur_idx(struct pstate_power_info *pi)
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{
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FILE *f_cur;
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int ret = -1;
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uint32_t sys_cur_freq = 0;
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unsigned int i;
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open_core_sysfs_file(&f_cur, "r", POWER_SYSFILE_CUR_FREQ,
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pi->lcore_id);
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if (f_cur == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_CUR_FREQ);
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goto fail;
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}
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ret = read_core_sysfs_u32(f_cur, &sys_cur_freq);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_CUR_FREQ);
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goto fail;
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}
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/* convert the frequency to nearest 100000 value
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* Ex: if sys_cur_freq=1396789 then freq_conv=1400000
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* Ex: if sys_cur_freq=800030 then freq_conv=800000
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* Ex: if sys_cur_freq=800030 then freq_conv=800000
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*/
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unsigned int freq_conv = 0;
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freq_conv = (sys_cur_freq + FREQ_ROUNDING_DELTA)
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/ ROUND_FREQ_TO_N_100000;
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freq_conv = freq_conv * ROUND_FREQ_TO_N_100000;
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for (i = 0; i < pi->nb_freqs; i++) {
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if (freq_conv == pi->freqs[i]) {
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pi->curr_idx = i;
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|
break;
|
|
}
|
|
}
|
|
|
|
ret = 0;
|
|
fail:
|
|
if (f_cur != NULL)
|
|
fclose(f_cur);
|
|
return ret;
|
|
}
|
|
|
|
int
|
|
power_pstate_cpufreq_check_supported(void)
|
|
{
|
|
return cpufreq_check_scaling_driver(POWER_PSTATE_DRIVER);
|
|
}
|
|
|
|
int
|
|
power_pstate_cpufreq_init(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
uint32_t exp_state;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Lcore id %u can not exceed %u\n",
|
|
lcore_id, RTE_MAX_LCORE - 1U);
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
exp_state = POWER_IDLE;
|
|
/* The power in use state works as a guard variable between
|
|
* the CPU frequency control initialization and exit process.
|
|
* The ACQUIRE memory ordering here pairs with the RELEASE
|
|
* ordering below as lock to make sure the frequency operations
|
|
* in the critical section are done under the correct state.
|
|
*/
|
|
if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
|
|
POWER_ONGOING, 0,
|
|
__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
|
|
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
|
|
"in use\n", lcore_id);
|
|
return -1;
|
|
}
|
|
|
|
pi->lcore_id = lcore_id;
|
|
/* Check and set the governor */
|
|
if (power_set_governor_performance(pi) < 0) {
|
|
RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
|
|
"performance\n", lcore_id);
|
|
goto fail;
|
|
}
|
|
/* Init for setting lcore frequency */
|
|
if (power_init_for_setting_freq(pi) < 0) {
|
|
RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
|
|
"lcore %u\n", lcore_id);
|
|
goto fail;
|
|
}
|
|
|
|
/* Get the available frequencies */
|
|
if (power_get_available_freqs(pi) < 0) {
|
|
RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
|
|
"lcore %u\n", lcore_id);
|
|
goto fail;
|
|
}
|
|
|
|
if (power_get_cur_idx(pi) < 0) {
|
|
RTE_LOG(ERR, POWER, "Cannot get current frequency "
|
|
"index of lcore %u\n", lcore_id);
|
|
goto fail;
|
|
}
|
|
|
|
/* Set freq to max by default */
|
|
if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
|
|
RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
|
|
"to max\n", lcore_id);
|
|
goto fail;
|
|
}
|
|
|
|
RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
|
|
"power management\n", lcore_id);
|
|
exp_state = POWER_ONGOING;
|
|
__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_USED,
|
|
0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
exp_state = POWER_ONGOING;
|
|
__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
|
|
0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
|
|
|
|
return -1;
|
|
}
|
|
|
|
int
|
|
power_pstate_cpufreq_exit(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
uint32_t exp_state;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
|
|
lcore_id, RTE_MAX_LCORE - 1U);
|
|
return -1;
|
|
}
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
exp_state = POWER_USED;
|
|
/* The power in use state works as a guard variable between
|
|
* the CPU frequency control initialization and exit process.
|
|
* The ACQUIRE memory ordering here pairs with the RELEASE
|
|
* ordering below as lock to make sure the frequency operations
|
|
* in the critical section are under done the correct state.
|
|
*/
|
|
if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
|
|
POWER_ONGOING, 0,
|
|
__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
|
|
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
|
|
"not used\n", lcore_id);
|
|
return -1;
|
|
}
|
|
|
|
/* Close FD of setting freq */
|
|
fclose(pi->f_cur_min);
|
|
fclose(pi->f_cur_max);
|
|
pi->f_cur_min = NULL;
|
|
pi->f_cur_max = NULL;
|
|
|
|
/* Set the governor back to the original */
|
|
if (power_set_governor_original(pi) < 0) {
|
|
RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
|
|
"to the original\n", lcore_id);
|
|
goto fail;
|
|
}
|
|
|
|
RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
|
|
"'performance' mode and been set back to the "
|
|
"original\n", lcore_id);
|
|
exp_state = POWER_ONGOING;
|
|
__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_IDLE,
|
|
0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
exp_state = POWER_ONGOING;
|
|
__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,
|
|
0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
|
|
|
|
return -1;
|
|
}
|
|
|
|
|
|
uint32_t
|
|
power_pstate_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return 0;
|
|
}
|
|
|
|
if (freqs == NULL) {
|
|
RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
|
|
return 0;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
if (num < pi->nb_freqs) {
|
|
RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
|
|
return 0;
|
|
}
|
|
rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
|
|
|
|
return pi->nb_freqs;
|
|
}
|
|
|
|
uint32_t
|
|
power_pstate_cpufreq_get_freq(unsigned int lcore_id)
|
|
{
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return RTE_POWER_INVALID_FREQ_INDEX;
|
|
}
|
|
|
|
return lcore_power_info[lcore_id].curr_idx;
|
|
}
|
|
|
|
|
|
int
|
|
power_pstate_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
|
|
{
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
return set_freq_internal(&(lcore_power_info[lcore_id]), index);
|
|
}
|
|
|
|
int
|
|
power_pstate_cpufreq_freq_up(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
if (pi->curr_idx == 0 ||
|
|
(pi->curr_idx == 1 && pi->turbo_available && !pi->turbo_enable))
|
|
return 0;
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
return set_freq_internal(pi, pi->curr_idx - 1);
|
|
}
|
|
|
|
int
|
|
power_pstate_cpufreq_freq_down(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
if (pi->curr_idx + 1 == pi->nb_freqs)
|
|
return 0;
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
return set_freq_internal(pi, pi->curr_idx + 1);
|
|
}
|
|
|
|
int
|
|
power_pstate_cpufreq_freq_max(unsigned int lcore_id)
|
|
{
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
if (lcore_power_info[lcore_id].turbo_available) {
|
|
if (lcore_power_info[lcore_id].turbo_enable)
|
|
/* Set to Turbo */
|
|
return set_freq_internal(
|
|
&lcore_power_info[lcore_id], 0);
|
|
else
|
|
/* Set to max non-turbo */
|
|
return set_freq_internal(
|
|
&lcore_power_info[lcore_id], 1);
|
|
} else
|
|
return set_freq_internal(&lcore_power_info[lcore_id], 0);
|
|
}
|
|
|
|
|
|
int
|
|
power_pstate_cpufreq_freq_min(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
return set_freq_internal(pi, pi->nb_freqs - 1);
|
|
}
|
|
|
|
|
|
int
|
|
power_pstate_turbo_status(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
return pi->turbo_enable;
|
|
}
|
|
|
|
int
|
|
power_pstate_enable_turbo(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
if (pi->turbo_available)
|
|
pi->turbo_enable = 1;
|
|
else {
|
|
pi->turbo_enable = 0;
|
|
RTE_LOG(ERR, POWER,
|
|
"Failed to enable turbo on lcore %u\n",
|
|
lcore_id);
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int
|
|
power_pstate_disable_turbo(unsigned int lcore_id)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
pi->turbo_enable = 0;
|
|
|
|
if (pi->turbo_available && pi->curr_idx <= 1) {
|
|
/* Try to set freq to max by default coming out of turbo */
|
|
if (power_pstate_cpufreq_freq_max(lcore_id) < 0) {
|
|
RTE_LOG(ERR, POWER,
|
|
"Failed to set frequency of lcore %u to max\n",
|
|
lcore_id);
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
int power_pstate_get_capabilities(unsigned int lcore_id,
|
|
struct rte_power_core_capabilities *caps)
|
|
{
|
|
struct pstate_power_info *pi;
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
return -1;
|
|
}
|
|
if (caps == NULL) {
|
|
RTE_LOG(ERR, POWER, "Invalid argument\n");
|
|
return -1;
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
caps->capabilities = 0;
|
|
caps->turbo = !!(pi->turbo_available);
|
|
caps->priority = pi->priority_core;
|
|
|
|
return 0;
|
|
}
|