4bbee28b15
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> Reviewed-by: Hemant Agrawal <hemant.agrawal@nxp.com> Acked-by: John McNamara <john.mcnamara@intel.com>
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595 lines
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.. BSD LICENSE
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Copyright (C) NXP. 2016.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of NXP nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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DPAA2 Poll Mode Driver
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======================
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The DPAA2 NIC PMD (**librte_pmd_dpaa2**) provides poll mode driver
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support for the inbuilt NIC found in the **NXP DPAA2** SoC family.
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More information can be found at `NXP Official Website
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<http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-arm-processors:QORIQ-ARM>`_.
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NXP DPAA2 (Data Path Acceleration Architecture Gen2)
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----------------------------------------------------
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This section provides an overview of the NXP DPAA2 architecture
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and how it is integrated into the DPDK.
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Contents summary
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- DPAA2 overview
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- Overview of DPAA2 objects
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- DPAA2 driver architecture overview
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.. _dpaa2_overview:
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DPAA2 Overview
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~~~~~~~~~~~~~~
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Reference: `FSL MC BUS in Linux Kernel <https://www.kernel.org/doc/readme/drivers-staging-fsl-mc-README.txt>`_.
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DPAA2 is a hardware architecture designed for high-speed network
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packet processing. DPAA2 consists of sophisticated mechanisms for
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processing Ethernet packets, queue management, buffer management,
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autonomous L2 switching, virtual Ethernet bridging, and accelerator
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(e.g. crypto) sharing.
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A DPAA2 hardware component called the Management Complex (or MC) manages the
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DPAA2 hardware resources. The MC provides an object-based abstraction for
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software drivers to use the DPAA2 hardware.
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The MC uses DPAA2 hardware resources such as queues, buffer pools, and
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network ports to create functional objects/devices such as network
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interfaces, an L2 switch, or accelerator instances.
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The MC provides memory-mapped I/O command interfaces (MC portals)
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which DPAA2 software drivers use to operate on DPAA2 objects:
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The diagram below shows an overview of the DPAA2 resource management
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architecture:
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.. code-block:: console
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+--------------------------------------+
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| OS |
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| DPAA2 drivers |
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+-----------------------------|--------+
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| (create,discover,connect
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| config,use,destroy)
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DPAA2 |
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+------------------------| mc portal |-+
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| | |
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| +- - - - - - - - - - - - -V- - -+ |
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| | | |
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| | Management Complex (MC) | |
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| +- - - - - - - - - - - - - - - -+ |
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| |
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| Hardware Hardware |
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| Resources Objects |
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| --------- ------- |
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| -queues -DPRC |
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| -buffer pools -DPMCP |
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| -Eth MACs/ports -DPIO |
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| -network interface -DPNI |
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| profiles -DPMAC |
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| -queue portals -DPBP |
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| -MC portals ... |
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| ... |
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+--------------------------------------+
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The MC mediates operations such as create, discover,
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connect, configuration, and destroy. Fast-path operations
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on data, such as packet transmit/receive, are not mediated by
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the MC and are done directly using memory mapped regions in
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DPIO objects.
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Overview of DPAA2 Objects
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~~~~~~~~~~~~~~~~~~~~~~~~~
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The section provides a brief overview of some key DPAA2 objects.
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A simple scenario is described illustrating the objects involved
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in creating a network interfaces.
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DPRC (Datapath Resource Container)
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A DPRC is a container object that holds all the other
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types of DPAA2 objects. In the example diagram below there
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are 8 objects of 5 types (DPMCP, DPIO, DPBP, DPNI, and DPMAC)
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in the container.
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.. code-block:: console
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+---------------------------------------------------------+
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| DPRC |
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| +-------+ +-------+ +-------+ +-------+ +-------+ |
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| | DPMCP | | DPIO | | DPBP | | DPNI | | DPMAC | |
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| +-------+ +-------+ +-------+ +---+---+ +---+---+ |
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| | DPMCP | | DPIO | |
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| +-------+ +-------+ |
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| | DPMCP | |
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| +-------+ |
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+---------------------------------------------------------+
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From the point of view of an OS, a DPRC behaves similar to a plug and
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play bus, like PCI. DPRC commands can be used to enumerate the contents
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of the DPRC, discover the hardware objects present (including mappable
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regions and interrupts).
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.. code-block:: console
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DPRC.1 (bus)
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+--+--------+-------+-------+-------+
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DPMCP.1 DPIO.1 DPBP.1 DPNI.1 DPMAC.1
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DPMCP.2 DPIO.2
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DPMCP.3
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Hardware objects can be created and destroyed dynamically, providing
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the ability to hot plug/unplug objects in and out of the DPRC.
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A DPRC has a mappable MMIO region (an MC portal) that can be used
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to send MC commands. It has an interrupt for status events (like
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hotplug).
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All objects in a container share the same hardware "isolation context".
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This means that with respect to an IOMMU the isolation granularity
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is at the DPRC (container) level, not at the individual object
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level.
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DPRCs can be defined statically and populated with objects
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via a config file passed to the MC when firmware starts
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it. There is also a Linux user space tool called "restool"
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that can be used to create/destroy containers and objects
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dynamically.
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DPAA2 Objects for an Ethernet Network Interface
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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A typical Ethernet NIC is monolithic-- the NIC device contains TX/RX
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queuing mechanisms, configuration mechanisms, buffer management,
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physical ports, and interrupts. DPAA2 uses a more granular approach
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utilizing multiple hardware objects. Each object provides specialized
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functions. Groups of these objects are used by software to provide
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Ethernet network interface functionality. This approach provides
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efficient use of finite hardware resources, flexibility, and
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performance advantages.
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The diagram below shows the objects needed for a simple
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network interface configuration on a system with 2 CPUs.
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.. code-block:: console
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+---+---+ +---+---+
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CPU0 CPU1
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+---+---+ +---+---+
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+---+---+ +---+---+
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DPIO DPIO
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+---+---+ +---+---+
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\ /
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\ /
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\ /
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+---+---+
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DPNI --- DPBP,DPMCP
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+---+---+
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+---+---+
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DPMAC
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+---+---+
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port/PHY
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Below the objects are described. For each object a brief description
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is provided along with a summary of the kinds of operations the object
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supports and a summary of key resources of the object (MMIO regions
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and IRQs).
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DPMAC (Datapath Ethernet MAC): represents an Ethernet MAC, a
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hardware device that connects to an Ethernet PHY and allows
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physical transmission and reception of Ethernet frames.
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- MMIO regions: none
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- IRQs: DPNI link change
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- commands: set link up/down, link config, get stats, IRQ config, enable, reset
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DPNI (Datapath Network Interface): contains TX/RX queues,
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network interface configuration, and RX buffer pool configuration
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mechanisms. The TX/RX queues are in memory and are identified by
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queue number.
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- MMIO regions: none
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- IRQs: link state
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- commands: port config, offload config, queue config, parse/classify config, IRQ config, enable, reset
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DPIO (Datapath I/O): provides interfaces to enqueue and dequeue
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packets and do hardware buffer pool management operations. The DPAA2
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architecture separates the mechanism to access queues (the DPIO object)
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from the queues themselves. The DPIO provides an MMIO interface to
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enqueue/dequeue packets. To enqueue something a descriptor is written
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to the DPIO MMIO region, which includes the target queue number.
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There will typically be one DPIO assigned to each CPU. This allows all
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CPUs to simultaneously perform enqueue/dequeued operations. DPIOs are
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expected to be shared by different DPAA2 drivers.
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- MMIO regions: queue operations, buffer management
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- IRQs: data availability, congestion notification, buffer pool depletion
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- commands: IRQ config, enable, reset
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DPBP (Datapath Buffer Pool): represents a hardware buffer
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pool.
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- MMIO regions: none
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- IRQs: none
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- commands: enable, reset
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DPMCP (Datapath MC Portal): provides an MC command portal.
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Used by drivers to send commands to the MC to manage
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objects.
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- MMIO regions: MC command portal
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- IRQs: command completion
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- commands: IRQ config, enable, reset
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Object Connections
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~~~~~~~~~~~~~~~~~~
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Some objects have explicit relationships that must
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be configured:
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- DPNI <--> DPMAC
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- DPNI <--> DPNI
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- DPNI <--> L2-switch-port
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A DPNI must be connected to something such as a DPMAC,
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another DPNI, or L2 switch port. The DPNI connection
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is made via a DPRC command.
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.. code-block:: console
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+-------+ +-------+
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| DPNI | | DPMAC |
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+---+---+ +---+---+
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+==========+
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- DPNI <--> DPBP
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A network interface requires a 'buffer pool' (DPBP object) which provides
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a list of pointers to memory where received Ethernet data is to be copied.
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The Ethernet driver configures the DPBPs associated with the network
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interface.
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Interrupts
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~~~~~~~~~~
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All interrupts generated by DPAA2 objects are message
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interrupts. At the hardware level message interrupts
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generated by devices will normally have 3 components--
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1) a non-spoofable 'device-id' expressed on the hardware
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bus, 2) an address, 3) a data value.
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In the case of DPAA2 devices/objects, all objects in the
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same container/DPRC share the same 'device-id'.
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For ARM-based SoC this is the same as the stream ID.
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DPAA2 DPDK - Poll Mode Driver Overview
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--------------------------------------
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This section provides an overview of the drivers for
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DPAA2-- 1) the bus driver and associated "DPAA2 infrastructure"
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drivers and 2) functional object drivers (such as Ethernet).
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As described previously, a DPRC is a container that holds the other
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types of DPAA2 objects. It is functionally similar to a plug-and-play
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bus controller.
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Each object in the DPRC is a Linux "device" and is bound to a driver.
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The diagram below shows the dpaa2 drivers involved in a networking
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scenario and the objects bound to each driver. A brief description
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of each driver follows.
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.. code-block: console
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+------------+
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| DPDK DPAA2 |
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| PMD |
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+------------+ +------------+
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| Ethernet |.......| Mempool |
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. . . . . . . . . | (DPNI) | | (DPBP) |
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. +---+---+----+ +-----+------+
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. ^ | .
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. | |<enqueue, .
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. | | dequeue> .
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. | | .
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. +---+---V----+ .
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. . . . . . . . . . .| DPIO driver| .
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. . | (DPIO) | .
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. . +-----+------+ .
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. . | QBMAN | .
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. . | Driver | .
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+----+------+-------+ +-----+----- | .
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| dpaa2 bus | | .
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| VFIO fslmc-bus |....................|.....................
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| /bus/fslmc | |
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+-------------------+ |
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========================== HARDWARE =====|=======================
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DPIO
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DPNI---DPBP
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DPMAC
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PHY
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=========================================|========================
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A brief description of each driver is provided below.
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DPAA2 bus driver
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~~~~~~~~~~~~~~~~
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The DPAA2 bus driver is a rte_bus driver which scans the fsl-mc bus.
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Key functions include:
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- Reading the container and setting up vfio group
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- Scanning and parsing the various MC objects and adding them to
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their respective device list.
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Additionally, it also provides the object driver for generic MC objects.
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DPIO driver
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~~~~~~~~~~~
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The DPIO driver is bound to DPIO objects and provides services that allow
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other drivers such as the Ethernet driver to enqueue and dequeue data for
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their respective objects.
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Key services include:
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- Data availability notifications
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- Hardware queuing operations (enqueue and dequeue of data)
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- Hardware buffer pool management
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To transmit a packet the Ethernet driver puts data on a queue and
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invokes a DPIO API. For receive, the Ethernet driver registers
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a data availability notification callback. To dequeue a packet
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a DPIO API is used.
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There is typically one DPIO object per physical CPU for optimum
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performance, allowing different CPUs to simultaneously enqueue
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and dequeue data.
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The DPIO driver operates on behalf of all DPAA2 drivers
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active -- Ethernet, crypto, compression, etc.
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DPBP based Mempool driver
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~~~~~~~~~~~~~~~~~~~~~~~~~
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The DPBP driver is bound to a DPBP objects and provides sevices to
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create a hardware offloaded packet buffer mempool.
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DPAA2 NIC Driver
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~~~~~~~~~~~~~~~~
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The Ethernet driver is bound to a DPNI and implements the kernel
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interfaces needed to connect the DPAA2 network interface to
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the network stack.
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Each DPNI corresponds to a DPDK network interface.
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Features
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^^^^^^^^
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Features of the DPAA2 PMD are:
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- Multiple queues for TX and RX
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- Receive Side Scaling (RSS)
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- Packet type information
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- Checksum offload
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- Promiscuous mode
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Supported DPAA2 SoCs
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--------------------
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- LS2080A/LS2040A
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- LS2084A/LS2044A
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- LS2088A/LS2048A
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- LS1088A/LS1048A
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Prerequisites
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-------------
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There are three main pre-requisities for executing DPAA2 PMD on a DPAA2
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compatible board:
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1. **ARM 64 Tool Chain**
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For example, the `*aarch64* Linaro Toolchain <https://releases.linaro.org/components/toolchain/binaries/4.9-2017.01/aarch64-linux-gnu>`_.
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2. **Linux Kernel**
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It can be obtained from `NXP's Github hosting <https://github.com/qoriq-open-source/linux>`_.
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3. **Rootfile system**
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Any *aarch64* supporting filesystem can be used. For example,
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Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained
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from `here <http://cdimage.ubuntu.com/ubuntu-base/releases/16.04/release/ubuntu-base-16.04.1-base-arm64.tar.gz>`_.
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As an alternative method, DPAA2 PMD can also be executed using images provided
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as part of SDK from NXP. The SDK includes all the above prerequisites necessary
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to bring up a DPAA2 board.
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The following dependencies are not part of DPDK and must be installed
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separately:
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- **NXP Linux SDK**
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NXP Linux software development kit (SDK) includes support for family
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of QorIQ® ARM-Architecture-based system on chip (SoC) processors
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and corresponding boards.
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It includes the Linux board support packages (BSPs) for NXP SoCs,
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a fully operational tool chain, kernel and board specific modules.
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SDK and related information can be obtained from: `NXP QorIQ SDK <http://www.nxp.com/products/software-and-tools/run-time-software/linux-sdk/linux-sdk-for-qoriq-processors:SDKLINUX>`_.
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- **DPDK Helper Scripts**
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DPAA2 based resources can be configured easily with the help of ready scripts
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as provided in the DPDK helper repository.
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`DPDK Helper Scripts <https://github.com/qoriq-open-source/dpdk-helper>`_.
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Currently supported by DPDK:
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- NXP SDK **2.0+**.
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- MC Firmware version **10.0.0** and higher.
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- Supported architectures: **arm64 LE**.
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- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
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.. note::
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Some part of fslmc bus code (mc flib - object library) routines are
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dual licensed (BSD & GPLv2).
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Pre-Installation Configuration
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------------------------------
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Config File Options
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~~~~~~~~~~~~~~~~~~~
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The following options can be modified in the ``config`` file.
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Please note that enabling debugging options may affect system performance.
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- ``CONFIG_RTE_LIBRTE_FSLMC_BUS`` (default ``n``)
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By default it is enabled only for defconfig_arm64-dpaa2-* config.
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Toggle compilation of the ``librte_bus_fslmc`` driver.
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- ``CONFIG_RTE_LIBRTE_DPAA2_PMD`` (default ``n``)
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By default it is enabled only for defconfig_arm64-dpaa2-* config.
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Toggle compilation of the ``librte_pmd_dpaa2`` driver.
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- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER`` (default ``n``)
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Toggle display of generic debugging messages
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- ``CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA`` (default ``y``)
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Toggle to use physical address vs virtual address for hardware accelerators.
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- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT`` (default ``n``)
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Toggle display of initialization related messages.
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- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX`` (default ``n``)
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Toggle display of receive fast path run-time message
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- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX`` (default ``n``)
|
|
|
|
Toggle display of transmit fast path run-time message
|
|
|
|
- ``CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE`` (default ``n``)
|
|
|
|
Toggle display of transmit fast path buffer free run-time message
|
|
|
|
Driver compilation and testing
|
|
------------------------------
|
|
|
|
Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
|
|
for details.
|
|
|
|
#. Running testpmd:
|
|
|
|
Follow instructions available in the document
|
|
:ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
|
|
to run testpmd.
|
|
|
|
Example output:
|
|
|
|
.. code-block:: console
|
|
|
|
./arm64-dpaa2-linuxapp-gcc/testpmd -c 0xff -n 1 \
|
|
-- -i --portmask=0x3 --nb-cores=1 --no-flush-rx
|
|
|
|
.....
|
|
EAL: Registered [pci] bus.
|
|
EAL: Registered [fslmc] bus.
|
|
EAL: Detected 8 lcore(s)
|
|
EAL: Probing VFIO support...
|
|
EAL: VFIO support initialized
|
|
.....
|
|
PMD: DPAA2: Processing Container = dprc.2
|
|
EAL: fslmc: DPRC contains = 51 devices
|
|
EAL: fslmc: Bus scan completed
|
|
.....
|
|
Configuring Port 0 (socket 0)
|
|
Port 0: 00:00:00:00:00:01
|
|
Configuring Port 1 (socket 0)
|
|
Port 1: 00:00:00:00:00:02
|
|
.....
|
|
Checking link statuses...
|
|
Port 0 Link Up - speed 10000 Mbps - full-duplex
|
|
Port 1 Link Up - speed 10000 Mbps - full-duplex
|
|
Done
|
|
testpmd>
|
|
|
|
Limitations
|
|
-----------
|
|
|
|
Platform Requirement
|
|
~~~~~~~~~~~~~~~~~~~~
|
|
DPAA2 drivers for DPDK can only work on NXP SoCs as listed in the
|
|
``Supported DPAA2 SoCs``.
|
|
|
|
Maximum packet length
|
|
~~~~~~~~~~~~~~~~~~~~~
|
|
|
|
The DPAA2 SoC family support a maximum of a 10240 jumbo frame. The value
|
|
is fixed and cannot be changed. So, even when the ``rxmode.max_rx_pkt_len``
|
|
member of ``struct rte_eth_conf`` is set to a value lower than 10240, frames
|
|
up to 10240 bytes can still reach the host interface.
|