8a82aef190
DPDK PCIe-VFIO framework configures base MSIX vector for interrupts
which is supported by other h/w. In case of bnxt, base MSIX vector
starts with the RX completion queue 0. To comply with the DPDK
framework We need to increase the map index by 1 so that RXTX
completion queues events can be delivered to appropriate event listeners
by kernel VFIO.
Fixes: bd0a14c99f65 ("net/bnxt: use dedicated CPR for async events")
Cc: stable@dpdk.org
Signed-off-by: Rahul Gupta <rahul.gupta@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
25 lines
534 B
C
25 lines
534 B
C
/* SPDX-License-Identifier: BSD-3-Clause
|
|
* Copyright(c) 2014-2018 Broadcom
|
|
* All rights reserved.
|
|
*/
|
|
|
|
#ifndef _BNXT_IRQ_H_
|
|
#define _BNXT_IRQ_H_
|
|
|
|
struct bnxt_irq {
|
|
rte_intr_callback_fn handler;
|
|
unsigned int vector;
|
|
uint8_t requested;
|
|
char name[RTE_ETH_NAME_MAX_LEN + 2];
|
|
};
|
|
|
|
struct bnxt;
|
|
int bnxt_free_int(struct bnxt *bp);
|
|
void bnxt_disable_int(struct bnxt *bp);
|
|
void bnxt_enable_int(struct bnxt *bp);
|
|
int bnxt_setup_int(struct bnxt *bp);
|
|
int bnxt_request_int(struct bnxt *bp);
|
|
void bnxt_int_handler(void *param);
|
|
|
|
#endif
|