aa0d4b8a01
The Virtio rework series mistakenly moved the rte_pci_device
pointer to struct virtio_hw, which is shared between the two
processes. But this structure is per-process, so this change
made secondary process to try accessing primary process-only
memory, leading to a crash.
This patch reverts to proper behavior, by storing the
rte_pci_device pointer into the per-process
virtio_pci_internal struct. It also provides helper to get
the pointer from the virtio_hw struct pointer.
Bugzilla ID: 633
Fixes: c8d4b02f72 ("net/virtio: move legacy IO to virtio PCI")
Reported-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
146 lines
4.5 KiB
C
146 lines
4.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2014 Intel Corporation
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*/
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#ifndef _VIRTIO_PCI_H_
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#define _VIRTIO_PCI_H_
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#include <stdint.h>
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#include <stdbool.h>
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#include <rte_pci.h>
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#include <rte_bus_pci.h>
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#include <ethdev_driver.h>
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#include "virtio.h"
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struct virtqueue;
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struct virtnet_ctl;
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/* VirtIO PCI vendor/device ID. */
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#define VIRTIO_PCI_VENDORID 0x1AF4
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#define VIRTIO_PCI_LEGACY_DEVICEID_NET 0x1000
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#define VIRTIO_PCI_MODERN_DEVICEID_NET 0x1041
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/* VirtIO ABI version, this must match exactly. */
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#define VIRTIO_PCI_ABI_VERSION 0
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/*
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* VirtIO Header, located in BAR 0.
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*/
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#define VIRTIO_PCI_HOST_FEATURES 0 /* host's supported features (32bit, RO)*/
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#define VIRTIO_PCI_GUEST_FEATURES 4 /* guest's supported features (32, RW) */
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#define VIRTIO_PCI_QUEUE_PFN 8 /* physical address of VQ (32, RW) */
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#define VIRTIO_PCI_QUEUE_NUM 12 /* number of ring entries (16, RO) */
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#define VIRTIO_PCI_QUEUE_SEL 14 /* current VQ selection (16, RW) */
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#define VIRTIO_PCI_QUEUE_NOTIFY 16 /* notify host regarding VQ (16, RW) */
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#define VIRTIO_PCI_STATUS 18 /* device status register (8, RW) */
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#define VIRTIO_PCI_ISR 19 /* interrupt status register, reading
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* also clears the register (8, RO) */
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/* Only if MSIX is enabled: */
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#define VIRTIO_MSI_CONFIG_VECTOR 20 /* configuration change vector (16, RW) */
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#define VIRTIO_MSI_QUEUE_VECTOR 22 /* vector for selected VQ notifications
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(16, RW) */
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/* Common configuration */
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#define VIRTIO_PCI_CAP_COMMON_CFG 1
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/* Notifications */
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#define VIRTIO_PCI_CAP_NOTIFY_CFG 2
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/* ISR Status */
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#define VIRTIO_PCI_CAP_ISR_CFG 3
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/* Device specific configuration */
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#define VIRTIO_PCI_CAP_DEVICE_CFG 4
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/* PCI configuration access */
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#define VIRTIO_PCI_CAP_PCI_CFG 5
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/* This is the PCI capability header: */
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struct virtio_pci_cap {
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uint8_t cap_vndr; /* Generic PCI field: PCI_CAP_ID_VNDR */
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uint8_t cap_next; /* Generic PCI field: next ptr. */
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uint8_t cap_len; /* Generic PCI field: capability length */
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uint8_t cfg_type; /* Identifies the structure. */
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uint8_t bar; /* Where to find it. */
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uint8_t padding[3]; /* Pad to full dword. */
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uint32_t offset; /* Offset within bar. */
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uint32_t length; /* Length of the structure, in bytes. */
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};
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struct virtio_pci_notify_cap {
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struct virtio_pci_cap cap;
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uint32_t notify_off_multiplier; /* Multiplier for queue_notify_off. */
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};
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/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
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struct virtio_pci_common_cfg {
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/* About the whole device. */
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uint32_t device_feature_select; /* read-write */
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uint32_t device_feature; /* read-only */
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uint32_t guest_feature_select; /* read-write */
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uint32_t guest_feature; /* read-write */
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uint16_t msix_config; /* read-write */
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uint16_t num_queues; /* read-only */
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uint8_t device_status; /* read-write */
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uint8_t config_generation; /* read-only */
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/* About a specific virtqueue. */
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uint16_t queue_select; /* read-write */
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uint16_t queue_size; /* read-write, power of 2. */
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uint16_t queue_msix_vector; /* read-write */
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uint16_t queue_enable; /* read-write */
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uint16_t queue_notify_off; /* read-only */
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uint32_t queue_desc_lo; /* read-write */
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uint32_t queue_desc_hi; /* read-write */
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uint32_t queue_avail_lo; /* read-write */
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uint32_t queue_avail_hi; /* read-write */
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uint32_t queue_used_lo; /* read-write */
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uint32_t queue_used_hi; /* read-write */
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};
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enum virtio_msix_status {
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VIRTIO_MSIX_NONE = 0,
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VIRTIO_MSIX_DISABLED = 1,
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VIRTIO_MSIX_ENABLED = 2
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};
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struct virtio_pci_dev {
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struct virtio_hw hw;
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struct virtio_pci_common_cfg *common_cfg;
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struct virtio_net_config *dev_cfg;
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enum virtio_msix_status msix_status;
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uint8_t *isr;
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uint16_t *notify_base;
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uint32_t notify_off_multiplier;
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bool modern;
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};
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#define virtio_pci_get_dev(hwp) container_of(hwp, struct virtio_pci_dev, hw)
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struct virtio_pci_internal {
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struct rte_pci_ioport io;
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struct rte_pci_device *dev;
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};
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extern struct virtio_pci_internal virtio_pci_internal[RTE_MAX_ETHPORTS];
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#define VTPCI_IO(hw) (&virtio_pci_internal[(hw)->port_id].io)
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#define VTPCI_DEV(hw) (virtio_pci_internal[(hw)->port_id].dev)
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/*
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* How many bits to shift physical queue address written to QUEUE_PFN.
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* 12 is historical, and due to x86 page size.
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*/
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#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
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/*
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* Function declaration from virtio_pci.c
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*/
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int vtpci_init(struct rte_pci_device *pci_dev, struct virtio_pci_dev *dev);
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void vtpci_legacy_ioport_unmap(struct virtio_hw *hw);
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int vtpci_legacy_ioport_map(struct virtio_hw *hw);
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extern const struct virtio_ops legacy_ops;
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extern const struct virtio_ops modern_ops;
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#endif /* _VIRTIO_PCI_H_ */
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