c0583d98a9
Different drivers use internal macros like force_inline for compiler always inline feature. Standardizing it through __rte_always_inline macro. Verified the change by comparing the output binary file. No difference found in the output binary file with this change. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Bruce Richardson <bruce.richardson@intel.com>
330 lines
11 KiB
C
330 lines
11 KiB
C
/*
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* BSD LICENSE
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*
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* Copyright (C) IBM Corporation 2016.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of IBM Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "acl_run.h"
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#include "acl_vect.h"
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struct _altivec_acl_const {
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rte_xmm_t xmm_shuffle_input;
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rte_xmm_t xmm_index_mask;
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rte_xmm_t xmm_ones_16;
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rte_xmm_t range_base;
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} altivec_acl_const __attribute__((aligned(RTE_CACHE_LINE_SIZE))) = {
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{
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.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
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},
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{
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.u32 = {RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX,
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RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX}
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},
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{
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.u16 = {1, 1, 1, 1, 1, 1, 1, 1}
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},
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{
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.u32 = {0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c}
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},
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};
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/*
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* Resolve priority for multiple results (altivec version).
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* This consists comparing the priority of the current traversal with the
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* running set of results for the packet.
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* For each result, keep a running array of the result (rule number) and
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* its priority for each category.
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*/
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static inline void
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resolve_priority_altivec(uint64_t transition, int n,
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const struct rte_acl_ctx *ctx, struct parms *parms,
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const struct rte_acl_match_results *p, uint32_t categories)
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{
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uint32_t x;
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xmm_t results, priority, results1, priority1;
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vector bool int selector;
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xmm_t *saved_results, *saved_priority;
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for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) {
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saved_results = (xmm_t *)(&parms[n].cmplt->results[x]);
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saved_priority =
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(xmm_t *)(&parms[n].cmplt->priority[x]);
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/* get results and priorities for completed trie */
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results = *(const xmm_t *)&p[transition].results[x];
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priority = *(const xmm_t *)&p[transition].priority[x];
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/* if this is not the first completed trie */
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if (parms[n].cmplt->count != ctx->num_tries) {
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/* get running best results and their priorities */
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results1 = *saved_results;
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priority1 = *saved_priority;
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/* select results that are highest priority */
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selector = vec_cmpgt(priority1, priority);
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results = vec_sel(results, results1, selector);
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priority = vec_sel(priority, priority1,
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selector);
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}
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/* save running best results and their priorities */
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*saved_results = results;
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*saved_priority = priority;
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}
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}
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/*
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* Check for any match in 4 transitions
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*/
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static __rte_always_inline uint32_t
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check_any_match_x4(uint64_t val[])
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{
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return (val[0] | val[1] | val[2] | val[3]) & RTE_ACL_NODE_MATCH;
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}
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static __rte_always_inline void
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acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms,
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struct acl_flow_data *flows, uint64_t transitions[])
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{
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while (check_any_match_x4(transitions)) {
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transitions[0] = acl_match_check(transitions[0], slot, ctx,
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parms, flows, resolve_priority_altivec);
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transitions[1] = acl_match_check(transitions[1], slot + 1, ctx,
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parms, flows, resolve_priority_altivec);
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transitions[2] = acl_match_check(transitions[2], slot + 2, ctx,
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parms, flows, resolve_priority_altivec);
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transitions[3] = acl_match_check(transitions[3], slot + 3, ctx,
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parms, flows, resolve_priority_altivec);
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}
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}
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/*
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* Process 4 transitions (in 2 XMM registers) in parallel
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*/
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static inline __attribute__((optimize("O2"))) xmm_t
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transition4(xmm_t next_input, const uint64_t *trans,
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xmm_t *indices1, xmm_t *indices2)
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{
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xmm_t addr, tr_lo, tr_hi;
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xmm_t in, node_type, r, t;
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xmm_t dfa_ofs, quad_ofs;
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xmm_t *index_mask, *tp;
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vector bool int dfa_msk;
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vector signed char zeroes = {};
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union {
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uint64_t d64[2];
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uint32_t d32[4];
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} v;
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/* Move low 32 into tr_lo and high 32 into tr_hi */
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tr_lo = (xmm_t){(*indices1)[0], (*indices1)[2],
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(*indices2)[0], (*indices2)[2]};
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tr_hi = (xmm_t){(*indices1)[1], (*indices1)[3],
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(*indices2)[1], (*indices2)[3]};
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/* Calculate the address (array index) for all 4 transitions. */
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index_mask = (xmm_t *)&altivec_acl_const.xmm_index_mask.u32;
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t = vec_xor(*index_mask, *index_mask);
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in = vec_perm(next_input, (xmm_t){},
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*(vector unsigned char *)&altivec_acl_const.xmm_shuffle_input);
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/* Calc node type and node addr */
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node_type = vec_and(vec_nor(*index_mask, *index_mask), tr_lo);
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addr = vec_and(tr_lo, *index_mask);
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/* mask for DFA type(0) nodes */
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dfa_msk = vec_cmpeq(node_type, t);
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/* DFA calculations. */
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r = vec_sr(in, (vector unsigned int){30, 30, 30, 30});
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tp = (xmm_t *)&altivec_acl_const.range_base.u32;
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r = vec_add(r, *tp);
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t = vec_sr(in, (vector unsigned int){24, 24, 24, 24});
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r = vec_perm(tr_hi, (xmm_t){(uint16_t)0 << 16},
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(vector unsigned char)r);
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dfa_ofs = vec_sub(t, r);
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/* QUAD/SINGLE caluclations. */
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t = (xmm_t)vec_cmpgt((vector signed char)in, (vector signed char)tr_hi);
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t = (xmm_t)vec_sel(
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vec_sel(
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(vector signed char)vec_sub(
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zeroes, (vector signed char)t),
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(vector signed char)t,
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vec_cmpgt((vector signed char)t, zeroes)),
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zeroes,
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vec_cmpeq((vector signed char)t, zeroes));
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t = (xmm_t)vec_msum((vector signed char)t,
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(vector unsigned char)t, (xmm_t){});
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quad_ofs = (xmm_t)vec_msum((vector signed short)t,
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*(vector signed short *)&altivec_acl_const.xmm_ones_16.u16,
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(xmm_t){});
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/* blend DFA and QUAD/SINGLE. */
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t = vec_sel(quad_ofs, dfa_ofs, dfa_msk);
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/* calculate address for next transitions. */
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addr = vec_add(addr, t);
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v.d64[0] = (uint64_t)trans[addr[0]];
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v.d64[1] = (uint64_t)trans[addr[1]];
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*indices1 = (xmm_t){v.d32[0], v.d32[1], v.d32[2], v.d32[3]};
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v.d64[0] = (uint64_t)trans[addr[2]];
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v.d64[1] = (uint64_t)trans[addr[3]];
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*indices2 = (xmm_t){v.d32[0], v.d32[1], v.d32[2], v.d32[3]};
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return vec_sr(next_input,
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(vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
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}
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/*
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* Execute trie traversal with 8 traversals in parallel
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*/
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static inline int
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search_altivec_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
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uint32_t *results, uint32_t total_packets, uint32_t categories)
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{
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int n;
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struct acl_flow_data flows;
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uint64_t index_array[MAX_SEARCHES_ALTIVEC8];
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struct completion cmplt[MAX_SEARCHES_ALTIVEC8];
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struct parms parms[MAX_SEARCHES_ALTIVEC8];
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xmm_t input0, input1;
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acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
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total_packets, categories, ctx->trans_table);
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for (n = 0; n < MAX_SEARCHES_ALTIVEC8; n++) {
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cmplt[n].count = 0;
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index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
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}
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/* Check for any matches. */
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acl_match_check_x4(0, ctx, parms, &flows, (uint64_t *)&index_array[0]);
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acl_match_check_x4(4, ctx, parms, &flows, (uint64_t *)&index_array[4]);
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while (flows.started > 0) {
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/* Gather 4 bytes of input data for each stream. */
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input0 = (xmm_t){GET_NEXT_4BYTES(parms, 0),
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GET_NEXT_4BYTES(parms, 1),
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GET_NEXT_4BYTES(parms, 2),
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GET_NEXT_4BYTES(parms, 3)};
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input1 = (xmm_t){GET_NEXT_4BYTES(parms, 4),
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GET_NEXT_4BYTES(parms, 5),
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GET_NEXT_4BYTES(parms, 6),
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GET_NEXT_4BYTES(parms, 7)};
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/* Process the 4 bytes of input on each stream. */
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input0 = transition4(input0, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input1 = transition4(input1, flows.trans,
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(xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
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input0 = transition4(input0, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input1 = transition4(input1, flows.trans,
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(xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
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input0 = transition4(input0, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input1 = transition4(input1, flows.trans,
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(xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
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input0 = transition4(input0, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input1 = transition4(input1, flows.trans,
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(xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
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/* Check for any matches. */
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acl_match_check_x4(0, ctx, parms, &flows,
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(uint64_t *)&index_array[0]);
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acl_match_check_x4(4, ctx, parms, &flows,
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(uint64_t *)&index_array[4]);
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}
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return 0;
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}
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/*
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* Execute trie traversal with 4 traversals in parallel
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*/
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static inline int
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search_altivec_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
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uint32_t *results, int total_packets, uint32_t categories)
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{
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int n;
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struct acl_flow_data flows;
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uint64_t index_array[MAX_SEARCHES_ALTIVEC4];
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struct completion cmplt[MAX_SEARCHES_ALTIVEC4];
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struct parms parms[MAX_SEARCHES_ALTIVEC4];
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xmm_t input;
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acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
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total_packets, categories, ctx->trans_table);
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for (n = 0; n < MAX_SEARCHES_ALTIVEC4; n++) {
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cmplt[n].count = 0;
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index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
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}
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/* Check for any matches. */
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acl_match_check_x4(0, ctx, parms, &flows, index_array);
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while (flows.started > 0) {
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/* Gather 4 bytes of input data for each stream. */
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input = (xmm_t){GET_NEXT_4BYTES(parms, 0),
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GET_NEXT_4BYTES(parms, 1),
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GET_NEXT_4BYTES(parms, 2),
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GET_NEXT_4BYTES(parms, 3)};
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/* Process the 4 bytes of input on each stream. */
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input = transition4(input, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input = transition4(input, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input = transition4(input, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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input = transition4(input, flows.trans,
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(xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
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/* Check for any matches. */
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acl_match_check_x4(0, ctx, parms, &flows, index_array);
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}
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return 0;
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}
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