6b5b3005cb
The global redirection table is used to create the default flow
rules for the ingress traffic with the lowest priority. It is also
used to create the default RSS rule in the destination table when
there is a tunnel offload.
To update the RETA in-flight, there is no restriction in the ethdev
API. In the previous implementation of mlx5, a port restart was
needed to make the new configuration take effect.
The restart is heavy, e.g., all the queues will be released and
reallocated, users' rules will be flushed. Since the restart is
internal, there is a risk to crash the application when some change
in the ethdev is introduced but no workaround is done in mlx5 PMD.
The users' rules, including the default miss rule for tunnel
offload, should not be impacted by the RETA update. It is improper
to flush all rules when updating RETA.
With this patch, only the default rules will be flushed and
re-created with the new table configuration.
Fixes: 3f2fe392bd
("net/mlx5: fix crash during RETA update")
Cc: stable@dpdk.org
Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
224 lines
5.4 KiB
C
224 lines
5.4 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2015 6WIND S.A.
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* Copyright 2015 Mellanox Technologies, Ltd
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <errno.h>
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#include <string.h>
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#include <rte_malloc.h>
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#include <ethdev_driver.h>
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#include <mlx5_malloc.h>
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#include "mlx5_defs.h"
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#include "mlx5.h"
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#include "mlx5_rxtx.h"
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#include "mlx5_rx.h"
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/**
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* DPDK callback to update the RSS hash configuration.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param[in] rss_conf
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* RSS configuration data.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_rss_hash_update(struct rte_eth_dev *dev,
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struct rte_eth_rss_conf *rss_conf)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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unsigned int i;
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unsigned int idx;
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if (rss_conf->rss_hf & MLX5_RSS_HF_MASK) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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if (rss_conf->rss_key && rss_conf->rss_key_len) {
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if (rss_conf->rss_key_len != MLX5_RSS_HASH_KEY_LEN) {
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DRV_LOG(ERR,
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"port %u RSS key len must be %s Bytes long",
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dev->data->port_id,
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RTE_STR(MLX5_RSS_HASH_KEY_LEN));
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rte_errno = EINVAL;
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return -rte_errno;
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}
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priv->rss_conf.rss_key = mlx5_realloc(priv->rss_conf.rss_key,
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MLX5_MEM_RTE,
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rss_conf->rss_key_len,
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0, SOCKET_ID_ANY);
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if (!priv->rss_conf.rss_key) {
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rte_errno = ENOMEM;
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return -rte_errno;
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}
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memcpy(priv->rss_conf.rss_key, rss_conf->rss_key,
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rss_conf->rss_key_len);
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priv->rss_conf.rss_key_len = rss_conf->rss_key_len;
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}
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priv->rss_conf.rss_hf = rss_conf->rss_hf;
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/* Enable the RSS hash in all Rx queues. */
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for (i = 0, idx = 0; idx != priv->rxqs_n; ++i) {
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struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
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if (rxq == NULL || rxq->ctrl == NULL)
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continue;
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rxq->ctrl->rxq.rss_hash = !!rss_conf->rss_hf &&
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!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS);
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++idx;
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}
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return 0;
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}
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/**
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* DPDK callback to get the RSS hash configuration.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param[in, out] rss_conf
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* RSS configuration data.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_rss_hash_conf_get(struct rte_eth_dev *dev,
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struct rte_eth_rss_conf *rss_conf)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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if (!rss_conf) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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if (rss_conf->rss_key &&
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(rss_conf->rss_key_len >= priv->rss_conf.rss_key_len)) {
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memcpy(rss_conf->rss_key, priv->rss_conf.rss_key,
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priv->rss_conf.rss_key_len);
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}
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rss_conf->rss_key_len = priv->rss_conf.rss_key_len;
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rss_conf->rss_hf = priv->rss_conf.rss_hf;
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return 0;
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}
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/**
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* Allocate/reallocate RETA index table.
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*
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* @param dev
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* Pointer to Ethernet device.
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* @praram reta_size
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* The size of the array to allocate.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_rss_reta_index_resize(struct rte_eth_dev *dev, unsigned int reta_size)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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void *mem;
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unsigned int old_size = priv->reta_idx_n;
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if (priv->reta_idx_n == reta_size)
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return 0;
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mem = mlx5_realloc(priv->reta_idx, MLX5_MEM_RTE,
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reta_size * sizeof((*priv->reta_idx)[0]), 0,
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SOCKET_ID_ANY);
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if (!mem) {
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rte_errno = ENOMEM;
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return -rte_errno;
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}
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priv->reta_idx = mem;
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priv->reta_idx_n = reta_size;
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if (old_size < reta_size)
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memset(&(*priv->reta_idx)[old_size], 0,
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(reta_size - old_size) *
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sizeof((*priv->reta_idx)[0]));
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return 0;
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}
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/**
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* DPDK callback to get the RETA indirection table.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param reta_conf
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* Pointer to RETA configuration structure array.
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* @param reta_size
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* Size of the RETA table.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_dev_rss_reta_query(struct rte_eth_dev *dev,
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struct rte_eth_rss_reta_entry64 *reta_conf,
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uint16_t reta_size)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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unsigned int idx;
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unsigned int i;
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if (!reta_size || reta_size > priv->reta_idx_n) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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/* Fill each entry of the table even if its bit is not set. */
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for (idx = 0, i = 0; (i != reta_size); ++i) {
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idx = i / RTE_ETH_RETA_GROUP_SIZE;
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reta_conf[idx].reta[i % RTE_ETH_RETA_GROUP_SIZE] =
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(*priv->reta_idx)[i];
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}
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return 0;
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}
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/**
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* DPDK callback to update the RETA indirection table.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param reta_conf
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* Pointer to RETA configuration structure array.
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* @param reta_size
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* Size of the RETA table.
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*
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* @return
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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*/
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int
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mlx5_dev_rss_reta_update(struct rte_eth_dev *dev,
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struct rte_eth_rss_reta_entry64 *reta_conf,
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uint16_t reta_size)
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{
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int ret;
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struct mlx5_priv *priv = dev->data->dev_private;
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unsigned int idx;
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unsigned int i;
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unsigned int pos;
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if (!reta_size) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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ret = mlx5_rss_reta_index_resize(dev, reta_size);
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if (ret)
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return ret;
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for (idx = 0, i = 0; (i != reta_size); ++i) {
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idx = i / RTE_ETH_RETA_GROUP_SIZE;
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pos = i % RTE_ETH_RETA_GROUP_SIZE;
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if (((reta_conf[idx].mask >> pos) & 0x1) == 0)
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continue;
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MLX5_ASSERT(reta_conf[idx].reta[pos] < priv->rxqs_n);
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(*priv->reta_idx)[i] = reta_conf[idx].reta[pos];
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}
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priv->skip_default_rss_reta = 1;
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return mlx5_traffic_restart(dev);
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}
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