ab3af0959d
non-temporal/transient/stream version of rte_prefetch0() The non-temporal prefetch is intended as a prefetch hint that processor will use the prefetched data only once or short period, unlike the rte_prefetch0() function which imply that prefetched data to use repeatedly. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Jan Viktorin <viktorin@rehivetech.com>
84 lines
3.0 KiB
C
84 lines
3.0 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_PREFETCH_H_
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#define _RTE_PREFETCH_H_
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/**
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* @file
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*
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* Prefetch operations.
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*
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* This file defines an API for prefetch macros / inline-functions,
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* which are architecture-dependent. Prefetching occurs when a
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* processor requests an instruction or data from memory to cache
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* before it is actually needed, potentially speeding up the execution of the
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* program.
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*/
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/**
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* Prefetch a cache line into all cache levels.
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* @param p
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* Address to prefetch
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*/
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static inline void rte_prefetch0(const volatile void *p);
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/**
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* Prefetch a cache line into all cache levels except the 0th cache level.
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* @param p
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* Address to prefetch
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*/
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static inline void rte_prefetch1(const volatile void *p);
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/**
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* Prefetch a cache line into all cache levels except the 0th and 1th cache
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* levels.
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* @param p
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* Address to prefetch
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*/
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static inline void rte_prefetch2(const volatile void *p);
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/**
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* Prefetch a cache line into all cache levels (non-temporal/transient version)
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*
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* The non-temporal prefetch is intended as a prefetch hint that processor will
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* use the prefetched data only once or short period, unlike the
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* rte_prefetch0() function which imply that prefetched data to use repeatedly.
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*
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* @param p
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* Address to prefetch
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*/
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static inline void rte_prefetch_non_temporal(const volatile void *p);
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#endif /* _RTE_PREFETCH_H_ */
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