5661516f22
Add EFX_FAMILY_IS_EF10() which may be used as synonym of any EF10-based NIC family (i.e. Huntigton, Medford or Medford2 at the time of addition). Suggested-by: Andy Moreton <amoreton@solarflare.com> Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
306 lines
6.8 KiB
C
306 lines
6.8 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2007-2018 Solarflare Communications Inc.
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* All rights reserved.
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*/
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#include "efx.h"
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#include "efx_impl.h"
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__checkReturn efx_rc_t
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efx_sram_buf_tbl_set(
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__in efx_nic_t *enp,
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__in uint32_t id,
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__in efsys_mem_t *esmp,
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__in size_t n)
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{
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efx_qword_t qword;
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uint32_t start = id;
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uint32_t stop = start + n;
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efsys_dma_addr_t addr;
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efx_oword_t oword;
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unsigned int count;
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efx_rc_t rc;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
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#if EFX_OPTS_EF10()
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if (EFX_FAMILY_IS_EF10(enp)) {
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/*
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* FIXME: the efx_sram_buf_tbl_*() functionality needs to be
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* pulled inside the Falcon/Siena queue create/destroy code,
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* and then the original functions can be removed (see bug30834
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* comment #1). But, for now, we just ensure that they are
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* no-ops for EF10, to allow bringing up existing drivers
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* without modification.
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*/
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return (0);
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}
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#endif /* EFX_OPTS_EF10() */
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if (stop >= EFX_BUF_TBL_SIZE) {
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rc = EFBIG;
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goto fail1;
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}
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/* Add the entries into the buffer table */
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addr = EFSYS_MEM_ADDR(esmp);
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for (id = start; id != stop; id++) {
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EFX_POPULATE_QWORD_5(qword,
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FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0,
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FRF_AZ_BUF_ADR_FBUF_DW0,
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(uint32_t)((addr >> 12) & 0xffffffff),
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FRF_AZ_BUF_ADR_FBUF_DW1,
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(uint32_t)((addr >> 12) >> 32),
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FRF_AZ_BUF_OWNER_ID_FBUF, 0);
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EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL,
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id, &qword);
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addr += EFX_BUF_SIZE;
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}
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EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
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/* Flush the write buffer */
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EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1,
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FRF_AZ_BUF_CLR_CMD, 0);
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EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
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/* Poll for the last entry being written to the buffer table */
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EFSYS_ASSERT3U(id, ==, stop);
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addr -= EFX_BUF_SIZE;
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count = 0;
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do {
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EFSYS_PROBE1(wait, unsigned int, count);
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/* Spin for 1 ms */
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EFSYS_SPIN(1000);
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EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
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id - 1, &qword);
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if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) ==
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(uint32_t)((addr >> 12) & 0xffffffff) &&
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EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) ==
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(uint32_t)((addr >> 12) >> 32))
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goto verify;
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} while (++count < 100);
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rc = ETIMEDOUT;
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goto fail2;
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verify:
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/* Verify the rest of the entries in the buffer table */
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while (--id != start) {
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addr -= EFX_BUF_SIZE;
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/* Read the buffer table entry */
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EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
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id - 1, &qword);
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if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) !=
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(uint32_t)((addr >> 12) & 0xffffffff) ||
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EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) !=
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(uint32_t)((addr >> 12) >> 32)) {
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rc = EFAULT;
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goto fail3;
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}
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}
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return (0);
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fail3:
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EFSYS_PROBE(fail3);
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id = stop;
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fail2:
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EFSYS_PROBE(fail2);
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EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
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FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1,
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FRF_AZ_BUF_CLR_START_ID, start);
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EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
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fail1:
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EFSYS_PROBE1(fail1, efx_rc_t, rc);
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return (rc);
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}
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void
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efx_sram_buf_tbl_clear(
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__in efx_nic_t *enp,
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__in uint32_t id,
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__in size_t n)
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{
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efx_oword_t oword;
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uint32_t start = id;
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uint32_t stop = start + n;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
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#if EFX_OPTS_EF10()
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if (EFX_FAMILY_IS_EF10(enp)) {
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/*
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* FIXME: the efx_sram_buf_tbl_*() functionality needs to be
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* pulled inside the Falcon/Siena queue create/destroy code,
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* and then the original functions can be removed (see bug30834
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* comment #1). But, for now, we just ensure that they are
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* no-ops for EF10, to allow bringing up existing drivers
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* without modification.
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*/
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return;
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}
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#endif /* EFX_OPTS_EF10() */
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EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE);
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EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
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EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
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FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1,
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FRF_AZ_BUF_CLR_START_ID, start);
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EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
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}
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#if EFSYS_OPT_DIAG
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static void
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efx_sram_byte_increment_set(
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__in size_t row,
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__in boolean_t negate,
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__out efx_qword_t *eqp)
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{
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size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
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unsigned int index;
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_NOTE(ARGUNUSED(negate))
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for (index = 0; index < sizeof (efx_qword_t); index++)
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eqp->eq_u8[index] = offset + index;
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}
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static void
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efx_sram_all_the_same_set(
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__in size_t row,
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__in boolean_t negate,
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__out efx_qword_t *eqp)
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{
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_NOTE(ARGUNUSED(row))
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if (negate)
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EFX_SET_QWORD(*eqp);
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else
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EFX_ZERO_QWORD(*eqp);
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}
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static void
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efx_sram_bit_alternate_set(
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__in size_t row,
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__in boolean_t negate,
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__out efx_qword_t *eqp)
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{
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_NOTE(ARGUNUSED(row))
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EFX_POPULATE_QWORD_2(*eqp,
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EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa,
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EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa);
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}
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static void
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efx_sram_byte_alternate_set(
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__in size_t row,
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__in boolean_t negate,
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__out efx_qword_t *eqp)
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{
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_NOTE(ARGUNUSED(row))
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EFX_POPULATE_QWORD_2(*eqp,
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EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00,
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EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00);
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}
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static void
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efx_sram_byte_changing_set(
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__in size_t row,
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__in boolean_t negate,
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__out efx_qword_t *eqp)
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{
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size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
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unsigned int index;
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for (index = 0; index < sizeof (efx_qword_t); index++) {
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uint8_t byte;
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if (offset / 256 == 0)
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byte = (uint8_t)((offset % 257) % 256);
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else
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byte = (uint8_t)(~((offset - 8) % 257) % 256);
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eqp->eq_u8[index] = (negate) ? ~byte : byte;
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}
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}
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static void
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efx_sram_bit_sweep_set(
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__in size_t row,
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__in boolean_t negate,
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__out efx_qword_t *eqp)
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{
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size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
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if (negate) {
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EFX_SET_QWORD(*eqp);
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EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
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} else {
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EFX_ZERO_QWORD(*eqp);
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EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
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}
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}
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efx_sram_pattern_fn_t __efx_sram_pattern_fns[] = {
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efx_sram_byte_increment_set,
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efx_sram_all_the_same_set,
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efx_sram_bit_alternate_set,
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efx_sram_byte_alternate_set,
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efx_sram_byte_changing_set,
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efx_sram_bit_sweep_set
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};
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__checkReturn efx_rc_t
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efx_sram_test(
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__in efx_nic_t *enp,
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__in efx_pattern_type_t type)
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{
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efx_sram_pattern_fn_t func;
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EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
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EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
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EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
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EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
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EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV));
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/* SRAM testing is only available on Siena. */
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if (enp->en_family != EFX_FAMILY_SIENA)
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return (0);
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/* Select pattern generator */
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EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES);
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func = __efx_sram_pattern_fns[type];
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return (siena_sram_test(enp, func));
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}
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#endif /* EFSYS_OPT_DIAG */
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