dd93390e57
This patch deletes ceq interfaces that not needed, fix aeq buges in some scenarios. Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
99 lines
1.9 KiB
C
99 lines
1.9 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*/
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#ifndef _HINIC_PMD_EQS_H_
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#define _HINIC_PMD_EQS_H_
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#define HINIC_EQ_PAGE_SIZE 0x00001000
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#define HINIC_AEQN_START 0
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#define HINIC_MAX_AEQS 4
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#define HINIC_EQ_MAX_PAGES 8
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#define HINIC_AEQE_SIZE 64
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#define HINIC_CEQE_SIZE 4
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#define HINIC_AEQE_DESC_SIZE 4
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#define HINIC_AEQE_DATA_SIZE \
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(HINIC_AEQE_SIZE - HINIC_AEQE_DESC_SIZE)
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#define HINIC_DEFAULT_AEQ_LEN 64
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#define GET_EQ_ELEMENT(eq, idx) \
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(((u8 *)(eq)->virt_addr[(idx) / (eq)->num_elem_in_pg]) + \
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(((u32)(idx) & ((eq)->num_elem_in_pg - 1)) * (eq)->elem_size))
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#define GET_AEQ_ELEM(eq, idx) \
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((struct hinic_aeq_elem *)GET_EQ_ELEMENT((eq), (idx)))
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#define GET_CEQ_ELEM(eq, idx) ((u32 *)GET_EQ_ELEMENT((eq), (idx)))
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enum hinic_eq_intr_mode {
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HINIC_INTR_MODE_ARMED,
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HINIC_INTR_MODE_ALWAYS,
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};
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enum hinic_eq_ci_arm_state {
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HINIC_EQ_NOT_ARMED,
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HINIC_EQ_ARMED,
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};
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enum hinic_aeq_type {
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HINIC_HW_INTER_INT = 0,
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HINIC_MBX_FROM_FUNC = 1,
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HINIC_MSG_FROM_MGMT_CPU = 2,
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HINIC_API_RSP = 3,
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HINIC_API_CHAIN_STS = 4,
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HINIC_MBX_SEND_RSLT = 5,
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HINIC_MAX_AEQ_EVENTS
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};
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#define HINIC_RETRY_NUM (10)
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struct hinic_eq {
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struct hinic_hwdev *hwdev;
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u16 q_id;
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u16 type;
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u32 page_size;
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u16 eq_len;
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u16 cons_idx;
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u16 wrapped;
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u16 elem_size;
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u16 num_pages;
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u32 num_elem_in_pg;
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struct irq_info eq_irq;
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dma_addr_t *dma_addr;
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u8 **virt_addr;
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u16 poll_retry_nr;
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};
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struct hinic_aeq_elem {
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u8 aeqe_data[HINIC_AEQE_DATA_SIZE];
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u32 desc;
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};
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struct hinic_aeqs {
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struct hinic_hwdev *hwdev;
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u16 poll_retry_nr;
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struct hinic_eq aeq[HINIC_MAX_AEQS];
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u16 num_aeqs;
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};
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void eq_update_ci(struct hinic_eq *eq);
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void hinic_dump_aeq_info(struct hinic_hwdev *hwdev);
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int hinic_comm_aeqs_init(struct hinic_hwdev *hwdev);
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void hinic_comm_aeqs_free(struct hinic_hwdev *hwdev);
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#endif /* _HINIC_PMD_EQS_H_ */
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