9ecb2ce782
When TRUFLOW is not enabled ulp_ctx is not allocated.
In non-vector Tx datapath we are accessing this invalid pointer
resulting in a segfault. Check if TRUFLOW is enabled before
accessing ulp_ctx to avoid this.
Fixes: 1e46b39626
("net/bnxt: fill cfa action in Tx descriptor")
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
542 lines
15 KiB
C
542 lines
15 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2014-2018 Broadcom
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* All rights reserved.
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*/
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#include <inttypes.h>
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#include <rte_byteorder.h>
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#include <rte_malloc.h>
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#include "bnxt.h"
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#include "bnxt_ring.h"
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#include "bnxt_txq.h"
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#include "bnxt_txr.h"
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#include "hsi_struct_def_dpdk.h"
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#include <stdbool.h>
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/*
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* TX Ring handling
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*/
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void bnxt_free_tx_rings(struct bnxt *bp)
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{
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int i;
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for (i = 0; i < (int)bp->tx_nr_rings; i++) {
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struct bnxt_tx_queue *txq = bp->tx_queues[i];
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if (!txq)
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continue;
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bnxt_free_ring(txq->tx_ring->tx_ring_struct);
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rte_free(txq->tx_ring->tx_ring_struct);
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rte_free(txq->tx_ring);
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bnxt_free_ring(txq->cp_ring->cp_ring_struct);
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rte_free(txq->cp_ring->cp_ring_struct);
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rte_free(txq->cp_ring);
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rte_free(txq);
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bp->tx_queues[i] = NULL;
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}
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}
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int bnxt_init_one_tx_ring(struct bnxt_tx_queue *txq)
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{
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struct bnxt_tx_ring_info *txr = txq->tx_ring;
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struct bnxt_ring *ring = txr->tx_ring_struct;
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txq->tx_wake_thresh = ring->ring_size / 2;
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ring->fw_ring_id = INVALID_HW_RING_ID;
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return 0;
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}
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int bnxt_init_tx_ring_struct(struct bnxt_tx_queue *txq, unsigned int socket_id)
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{
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struct bnxt_cp_ring_info *cpr;
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struct bnxt_tx_ring_info *txr;
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struct bnxt_ring *ring;
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txr = rte_zmalloc_socket("bnxt_tx_ring",
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sizeof(struct bnxt_tx_ring_info),
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RTE_CACHE_LINE_SIZE, socket_id);
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if (txr == NULL)
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return -ENOMEM;
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txq->tx_ring = txr;
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ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
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sizeof(struct bnxt_ring),
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RTE_CACHE_LINE_SIZE, socket_id);
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if (ring == NULL)
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return -ENOMEM;
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txr->tx_ring_struct = ring;
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ring->ring_size = rte_align32pow2(txq->nb_tx_desc);
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ring->ring_mask = ring->ring_size - 1;
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ring->bd = (void *)txr->tx_desc_ring;
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ring->bd_dma = txr->tx_desc_mapping;
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ring->vmem_size = ring->ring_size * sizeof(struct bnxt_sw_tx_bd);
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ring->vmem = (void **)&txr->tx_buf_ring;
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cpr = rte_zmalloc_socket("bnxt_tx_ring",
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sizeof(struct bnxt_cp_ring_info),
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RTE_CACHE_LINE_SIZE, socket_id);
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if (cpr == NULL)
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return -ENOMEM;
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txq->cp_ring = cpr;
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ring = rte_zmalloc_socket("bnxt_tx_ring_struct",
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sizeof(struct bnxt_ring),
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RTE_CACHE_LINE_SIZE, socket_id);
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if (ring == NULL)
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return -ENOMEM;
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cpr->cp_ring_struct = ring;
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ring->ring_size = txr->tx_ring_struct->ring_size;
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ring->ring_mask = ring->ring_size - 1;
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ring->bd = (void *)cpr->cp_desc_ring;
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ring->bd_dma = cpr->cp_desc_mapping;
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ring->vmem_size = 0;
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ring->vmem = NULL;
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return 0;
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}
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static uint16_t bnxt_start_xmit(struct rte_mbuf *tx_pkt,
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struct bnxt_tx_queue *txq,
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uint16_t *coal_pkts,
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struct tx_bd_long **last_txbd)
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{
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struct bnxt_tx_ring_info *txr = txq->tx_ring;
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uint32_t outer_tpid_bd = 0;
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struct tx_bd_long *txbd;
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struct tx_bd_long_hi *txbd1 = NULL;
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uint32_t vlan_tag_flags, cfa_action;
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bool long_bd = false;
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unsigned short nr_bds = 0;
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struct rte_mbuf *m_seg;
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struct bnxt_sw_tx_bd *tx_buf;
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static const uint32_t lhint_arr[4] = {
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TX_BD_LONG_FLAGS_LHINT_LT512,
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TX_BD_LONG_FLAGS_LHINT_LT1K,
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TX_BD_LONG_FLAGS_LHINT_LT2K,
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TX_BD_LONG_FLAGS_LHINT_LT2K
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};
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if (unlikely(is_bnxt_in_error(txq->bp)))
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return -EIO;
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if (tx_pkt->ol_flags & (PKT_TX_TCP_SEG | PKT_TX_TCP_CKSUM |
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PKT_TX_UDP_CKSUM | PKT_TX_IP_CKSUM |
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PKT_TX_VLAN_PKT | PKT_TX_OUTER_IP_CKSUM |
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PKT_TX_TUNNEL_GRE | PKT_TX_TUNNEL_VXLAN |
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PKT_TX_TUNNEL_GENEVE | PKT_TX_IEEE1588_TMST |
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PKT_TX_QINQ_PKT) ||
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(BNXT_TRUFLOW_EN(txq->bp) &&
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(txq->bp->ulp_ctx->cfg_data->tx_cfa_action ||
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txq->vfr_tx_cfa_action)))
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long_bd = true;
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nr_bds = long_bd + tx_pkt->nb_segs;
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if (unlikely(bnxt_tx_avail(txq) < nr_bds))
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return -ENOMEM;
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/* Check if number of Tx descriptors is above HW limit */
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if (unlikely(nr_bds > BNXT_MAX_TSO_SEGS)) {
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PMD_DRV_LOG(ERR,
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"Num descriptors %d exceeds HW limit\n", nr_bds);
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return -ENOSPC;
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}
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/* If packet length is less than minimum packet size, pad it */
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if (unlikely(rte_pktmbuf_pkt_len(tx_pkt) < BNXT_MIN_PKT_SIZE)) {
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uint8_t pad = BNXT_MIN_PKT_SIZE - rte_pktmbuf_pkt_len(tx_pkt);
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char *seg = rte_pktmbuf_append(tx_pkt, pad);
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if (!seg) {
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PMD_DRV_LOG(ERR,
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"Failed to pad mbuf by %d bytes\n",
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pad);
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return -ENOMEM;
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}
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/* Note: data_len, pkt len are updated in rte_pktmbuf_append */
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memset(seg, 0, pad);
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}
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/* Check non zero data_len */
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RTE_VERIFY(tx_pkt->data_len);
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tx_buf = &txr->tx_buf_ring[txr->tx_prod];
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tx_buf->mbuf = tx_pkt;
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tx_buf->nr_bds = nr_bds;
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txbd = &txr->tx_desc_ring[txr->tx_prod];
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txbd->opaque = *coal_pkts;
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txbd->flags_type = nr_bds << TX_BD_LONG_FLAGS_BD_CNT_SFT;
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txbd->flags_type |= TX_BD_SHORT_FLAGS_COAL_NOW;
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txbd->flags_type |= TX_BD_LONG_FLAGS_NO_CMPL;
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txbd->len = tx_pkt->data_len;
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if (tx_pkt->pkt_len >= 2014)
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txbd->flags_type |= TX_BD_LONG_FLAGS_LHINT_GTE2K;
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else
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txbd->flags_type |= lhint_arr[tx_pkt->pkt_len >> 9];
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txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(tx_buf->mbuf));
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*last_txbd = txbd;
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if (long_bd) {
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txbd->flags_type |= TX_BD_LONG_TYPE_TX_BD_LONG;
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vlan_tag_flags = 0;
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if (BNXT_TRUFLOW_EN(txq->bp)) {
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if (txq->vfr_tx_cfa_action)
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cfa_action = txq->vfr_tx_cfa_action;
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else
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cfa_action =
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txq->bp->ulp_ctx->cfg_data->tx_cfa_action;
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}
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/* HW can accelerate only outer vlan in QinQ mode */
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if (tx_buf->mbuf->ol_flags & PKT_TX_QINQ_PKT) {
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vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
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tx_buf->mbuf->vlan_tci_outer;
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outer_tpid_bd = txq->bp->outer_tpid_bd &
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BNXT_OUTER_TPID_BD_MASK;
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vlan_tag_flags |= outer_tpid_bd;
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} else if (tx_buf->mbuf->ol_flags & PKT_TX_VLAN_PKT) {
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/* shurd: Should this mask at
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* TX_BD_LONG_CFA_META_VLAN_VID_MASK?
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*/
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vlan_tag_flags = TX_BD_LONG_CFA_META_KEY_VLAN_TAG |
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tx_buf->mbuf->vlan_tci;
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/* Currently supports 8021Q, 8021AD vlan offloads
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* QINQ1, QINQ2, QINQ3 vlan headers are deprecated
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*/
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/* DPDK only supports 802.11q VLAN packets */
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vlan_tag_flags |=
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TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100;
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}
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txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
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txbd1 = (struct tx_bd_long_hi *)
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&txr->tx_desc_ring[txr->tx_prod];
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txbd1->lflags = 0;
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txbd1->cfa_meta = vlan_tag_flags;
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if (BNXT_TRUFLOW_EN(txq->bp))
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txbd1->cfa_action = cfa_action;
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if (tx_pkt->ol_flags & PKT_TX_TCP_SEG) {
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uint16_t hdr_size;
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/* TSO */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_LSO |
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TX_BD_LONG_LFLAGS_T_IPID;
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hdr_size = tx_pkt->l2_len + tx_pkt->l3_len +
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tx_pkt->l4_len;
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hdr_size += (tx_pkt->ol_flags & PKT_TX_TUNNEL_MASK) ?
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tx_pkt->outer_l2_len +
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tx_pkt->outer_l3_len : 0;
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/* The hdr_size is multiple of 16bit units not 8bit.
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* Hence divide by 2.
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*/
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txbd1->hdr_size = hdr_size >> 1;
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txbd1->mss = tx_pkt->tso_segsz;
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RTE_VERIFY(txbd1->mss);
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_UDP_CKSUM) ==
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PKT_TX_OIP_IIP_TCP_UDP_CKSUM) {
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/* Outer IP, Inner IP, Inner TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_TCP_CKSUM) ==
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PKT_TX_OIP_IIP_TCP_CKSUM) {
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/* Outer IP, Inner IP, Inner TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_UDP_CKSUM) ==
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PKT_TX_OIP_IIP_UDP_CKSUM) {
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/* Outer IP, Inner IP, Inner TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_IP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_UDP_CKSUM) ==
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PKT_TX_IIP_TCP_UDP_CKSUM) {
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/* (Inner) IP, (Inner) TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_IIP_UDP_CKSUM) ==
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PKT_TX_IIP_UDP_CKSUM) {
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/* (Inner) IP, (Inner) TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_IIP_TCP_CKSUM) ==
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PKT_TX_IIP_TCP_CKSUM) {
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/* (Inner) IP, (Inner) TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_IP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_UDP_CKSUM) ==
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PKT_TX_OIP_TCP_UDP_CKSUM) {
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/* Outer IP, (Inner) TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_UDP_CKSUM) ==
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PKT_TX_OIP_UDP_CKSUM) {
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/* Outer IP, (Inner) TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_TCP_CKSUM) ==
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PKT_TX_OIP_TCP_CKSUM) {
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/* Outer IP, (Inner) TCP/UDP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OIP_IIP_CKSUM) ==
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PKT_TX_OIP_IIP_CKSUM) {
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/* Outer IP, Inner IP CSO */
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txbd1->lflags |= TX_BD_FLG_TIP_IP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_TCP_UDP_CKSUM) ==
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PKT_TX_TCP_UDP_CKSUM) {
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/* TCP/UDP CSO */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_TCP_CKSUM) ==
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PKT_TX_TCP_CKSUM) {
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/* TCP/UDP CSO */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_UDP_CKSUM) ==
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PKT_TX_UDP_CKSUM) {
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/* TCP/UDP CSO */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_IP_CKSUM) ==
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PKT_TX_IP_CKSUM) {
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/* IP CSO */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_IP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_OUTER_IP_CKSUM) ==
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PKT_TX_OUTER_IP_CKSUM) {
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/* IP CSO */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_T_IP_CHKSUM;
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txbd1->mss = 0;
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} else if ((tx_pkt->ol_flags & PKT_TX_IEEE1588_TMST) ==
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PKT_TX_IEEE1588_TMST) {
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/* PTP */
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txbd1->lflags |= TX_BD_LONG_LFLAGS_STAMP;
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txbd1->mss = 0;
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}
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} else {
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txbd->flags_type |= TX_BD_SHORT_TYPE_TX_BD_SHORT;
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}
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m_seg = tx_pkt->next;
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while (m_seg) {
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/* Check non zero data_len */
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RTE_VERIFY(m_seg->data_len);
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txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
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tx_buf = &txr->tx_buf_ring[txr->tx_prod];
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tx_buf->mbuf = m_seg;
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txbd = &txr->tx_desc_ring[txr->tx_prod];
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txbd->address = rte_cpu_to_le_64(rte_mbuf_data_iova(m_seg));
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txbd->flags_type = TX_BD_SHORT_TYPE_TX_BD_SHORT;
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txbd->len = m_seg->data_len;
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m_seg = m_seg->next;
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}
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txbd->flags_type |= TX_BD_LONG_FLAGS_PACKET_END;
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txr->tx_prod = RING_NEXT(txr->tx_ring_struct, txr->tx_prod);
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return 0;
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}
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static void bnxt_tx_cmp(struct bnxt_tx_queue *txq, int nr_pkts)
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{
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struct bnxt_tx_ring_info *txr = txq->tx_ring;
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struct rte_mempool *pool = NULL;
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struct rte_mbuf **free = txq->free;
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uint16_t cons = txr->tx_cons;
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unsigned int blk = 0;
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int i, j;
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for (i = 0; i < nr_pkts; i++) {
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struct rte_mbuf *mbuf;
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struct bnxt_sw_tx_bd *tx_buf = &txr->tx_buf_ring[cons];
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unsigned short nr_bds = tx_buf->nr_bds;
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for (j = 0; j < nr_bds; j++) {
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mbuf = tx_buf->mbuf;
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tx_buf->mbuf = NULL;
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cons = RING_NEXT(txr->tx_ring_struct, cons);
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tx_buf = &txr->tx_buf_ring[cons];
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if (!mbuf) /* long_bd's tx_buf ? */
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continue;
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mbuf = rte_pktmbuf_prefree_seg(mbuf);
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if (unlikely(!mbuf))
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continue;
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/* EW - no need to unmap DMA memory? */
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if (likely(mbuf->pool == pool)) {
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/* Add mbuf to the bulk free array */
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free[blk++] = mbuf;
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} else {
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/* Found an mbuf from a different pool. Free
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* mbufs accumulated so far to the previous
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* pool
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*/
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if (likely(pool != NULL))
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rte_mempool_put_bulk(pool,
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(void *)free,
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blk);
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/* Start accumulating mbufs in a new pool */
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free[0] = mbuf;
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pool = mbuf->pool;
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blk = 1;
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}
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}
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}
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if (blk)
|
|
rte_mempool_put_bulk(pool, (void *)free, blk);
|
|
|
|
txr->tx_cons = cons;
|
|
}
|
|
|
|
static int bnxt_handle_tx_cp(struct bnxt_tx_queue *txq)
|
|
{
|
|
struct bnxt_cp_ring_info *cpr = txq->cp_ring;
|
|
uint32_t raw_cons = cpr->cp_raw_cons;
|
|
uint32_t cons;
|
|
uint32_t nb_tx_pkts = 0;
|
|
struct tx_cmpl *txcmp;
|
|
struct cmpl_base *cp_desc_ring = cpr->cp_desc_ring;
|
|
struct bnxt_ring *cp_ring_struct = cpr->cp_ring_struct;
|
|
uint32_t ring_mask = cp_ring_struct->ring_mask;
|
|
uint32_t opaque = 0;
|
|
|
|
if (bnxt_tx_bds_in_hw(txq) < txq->tx_free_thresh)
|
|
return 0;
|
|
|
|
do {
|
|
cons = RING_CMPL(ring_mask, raw_cons);
|
|
txcmp = (struct tx_cmpl *)&cpr->cp_desc_ring[cons];
|
|
rte_prefetch_non_temporal(&cp_desc_ring[(cons + 2) &
|
|
ring_mask]);
|
|
|
|
if (!CMPL_VALID(txcmp, cpr->valid))
|
|
break;
|
|
opaque = rte_cpu_to_le_32(txcmp->opaque);
|
|
NEXT_CMPL(cpr, cons, cpr->valid, 1);
|
|
rte_prefetch0(&cp_desc_ring[cons]);
|
|
|
|
if (CMP_TYPE(txcmp) == TX_CMPL_TYPE_TX_L2)
|
|
nb_tx_pkts += opaque;
|
|
else
|
|
RTE_LOG_DP(ERR, PMD,
|
|
"Unhandled CMP type %02x\n",
|
|
CMP_TYPE(txcmp));
|
|
raw_cons = cons;
|
|
} while (nb_tx_pkts < ring_mask);
|
|
|
|
if (nb_tx_pkts) {
|
|
bnxt_tx_cmp(txq, nb_tx_pkts);
|
|
cpr->cp_raw_cons = raw_cons;
|
|
bnxt_db_cq(cpr);
|
|
}
|
|
|
|
return nb_tx_pkts;
|
|
}
|
|
|
|
uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
|
|
uint16_t nb_pkts)
|
|
{
|
|
int rc;
|
|
uint16_t nb_tx_pkts = 0;
|
|
uint16_t coal_pkts = 0;
|
|
struct bnxt_tx_queue *txq = tx_queue;
|
|
struct tx_bd_long *last_txbd = NULL;
|
|
|
|
/* Handle TX completions */
|
|
bnxt_handle_tx_cp(txq);
|
|
|
|
/* Tx queue was stopped; wait for it to be restarted */
|
|
if (unlikely(!txq->tx_started)) {
|
|
PMD_DRV_LOG(DEBUG, "Tx q stopped;return\n");
|
|
return 0;
|
|
}
|
|
|
|
/* Handle TX burst request */
|
|
for (nb_tx_pkts = 0; nb_tx_pkts < nb_pkts; nb_tx_pkts++) {
|
|
coal_pkts++;
|
|
rc = bnxt_start_xmit(tx_pkts[nb_tx_pkts], txq,
|
|
&coal_pkts, &last_txbd);
|
|
|
|
if (unlikely(rc))
|
|
break;
|
|
}
|
|
|
|
if (likely(nb_tx_pkts)) {
|
|
/* Request a completion on the last packet */
|
|
last_txbd->flags_type &= ~TX_BD_LONG_FLAGS_NO_CMPL;
|
|
bnxt_db_write(&txq->tx_ring->tx_db, txq->tx_ring->tx_prod);
|
|
}
|
|
|
|
return nb_tx_pkts;
|
|
}
|
|
|
|
/*
|
|
* Dummy DPDK callback for TX.
|
|
*
|
|
* This function is used to temporarily replace the real callback during
|
|
* unsafe control operations on the queue, or in case of error.
|
|
*/
|
|
uint16_t
|
|
bnxt_dummy_xmit_pkts(void *tx_queue __rte_unused,
|
|
struct rte_mbuf **tx_pkts __rte_unused,
|
|
uint16_t nb_pkts __rte_unused)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
int bnxt_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
|
|
{
|
|
struct bnxt *bp = dev->data->dev_private;
|
|
struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
|
|
int rc = 0;
|
|
|
|
rc = is_bnxt_in_error(bp);
|
|
if (rc)
|
|
return rc;
|
|
|
|
dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
|
|
txq->tx_started = true;
|
|
PMD_DRV_LOG(DEBUG, "Tx queue started\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
int bnxt_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
|
|
{
|
|
struct bnxt *bp = dev->data->dev_private;
|
|
struct bnxt_tx_queue *txq = bp->tx_queues[tx_queue_id];
|
|
int rc = 0;
|
|
|
|
rc = is_bnxt_in_error(bp);
|
|
if (rc)
|
|
return rc;
|
|
|
|
/* Handle TX completions */
|
|
bnxt_handle_tx_cp(txq);
|
|
|
|
dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
|
|
txq->tx_started = false;
|
|
PMD_DRV_LOG(DEBUG, "Tx queue stopped\n");
|
|
|
|
return 0;
|
|
}
|