55984a9bb5
MC firmware is the core component of FSLMC bus and DPAA2 devices. Prior to this patch, MC firmware supported 10.10.x version. This patch bumps the min supported version to 10.14.x. Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
803 lines
17 KiB
C
803 lines
17 KiB
C
/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
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*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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* Copyright 2016-2017 NXP
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*
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*/
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#ifndef _FSL_DPNI_CMD_H
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#define _FSL_DPNI_CMD_H
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/* DPNI Version */
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#define DPNI_VER_MAJOR 7
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#define DPNI_VER_MINOR 9
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#define DPNI_CMD_BASE_VERSION 1
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#define DPNI_CMD_VERSION_2 2
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#define DPNI_CMD_VERSION_3 3
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#define DPNI_CMD_ID_OFFSET 4
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#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
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#define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_2)
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#define DPNI_CMD_V3(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_3)
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/* Command IDs */
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#define DPNI_CMDID_OPEN DPNI_CMD(0x801)
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#define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
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#define DPNI_CMDID_CREATE DPNI_CMD_V3(0x901)
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#define DPNI_CMDID_DESTROY DPNI_CMD(0x981)
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#define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)
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#define DPNI_CMDID_ENABLE DPNI_CMD(0x002)
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#define DPNI_CMDID_DISABLE DPNI_CMD(0x003)
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#define DPNI_CMDID_GET_ATTR DPNI_CMD_V3(0x004)
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#define DPNI_CMDID_RESET DPNI_CMD(0x005)
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#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)
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#define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012)
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#define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013)
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#define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014)
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#define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015)
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#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016)
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#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017)
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#define DPNI_CMDID_SET_POOLS DPNI_CMD_V2(0x200)
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#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)
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#define DPNI_CMDID_GET_QDID DPNI_CMD(0x210)
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#define DPNI_CMDID_GET_SP_INFO DPNI_CMD(0x211)
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#define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212)
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#define DPNI_CMDID_GET_LINK_STATE DPNI_CMD_V2(0x215)
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#define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216)
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#define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217)
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#define DPNI_CMDID_SET_LINK_CFG DPNI_CMD_V2(0x21A)
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#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD_V2(0x21B)
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#define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220)
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#define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221)
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#define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222)
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#define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223)
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#define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224)
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#define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225)
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#define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226)
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#define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227)
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#define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228)
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#define DPNI_CMDID_ENABLE_VLAN_FILTER DPNI_CMD(0x230)
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#define DPNI_CMDID_ADD_VLAN_ID DPNI_CMD(0x231)
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#define DPNI_CMDID_REMOVE_VLAN_ID DPNI_CMD(0x232)
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#define DPNI_CMDID_CLR_VLAN_FILTERS DPNI_CMD(0x233)
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#define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD_V3(0x235)
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#define DPNI_CMDID_SET_QOS_TBL DPNI_CMD_V2(0x240)
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#define DPNI_CMDID_ADD_QOS_ENT DPNI_CMD(0x241)
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#define DPNI_CMDID_REMOVE_QOS_ENT DPNI_CMD(0x242)
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#define DPNI_CMDID_CLR_QOS_TBL DPNI_CMD(0x243)
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#define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244)
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#define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245)
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#define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246)
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#define DPNI_CMDID_GET_STATISTICS DPNI_CMD_V3(0x25D)
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#define DPNI_CMDID_RESET_STATISTICS DPNI_CMD(0x25E)
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#define DPNI_CMDID_GET_QUEUE DPNI_CMD_V2(0x25F)
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#define DPNI_CMDID_SET_QUEUE DPNI_CMD_V2(0x260)
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#define DPNI_CMDID_GET_TAILDROP DPNI_CMD_V2(0x261)
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#define DPNI_CMDID_SET_TAILDROP DPNI_CMD_V2(0x262)
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#define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263)
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#define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD_V2(0x264)
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#define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD_V2(0x265)
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#define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD_V2(0x267)
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#define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD_V2(0x268)
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#define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD_V2(0x269)
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#define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD_V2(0x26A)
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#define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B)
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#define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C)
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#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266)
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#define DPNI_CMDID_GET_TX_CONFIRMATION_MODE DPNI_CMD(0x26D)
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#define DPNI_CMDID_SET_OPR DPNI_CMD(0x26e)
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#define DPNI_CMDID_GET_OPR DPNI_CMD(0x26f)
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#define DPNI_CMDID_SET_RX_FS_DIST DPNI_CMD(0x273)
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#define DPNI_CMDID_SET_RX_HASH_DIST DPNI_CMD(0x274)
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#define DPNI_CMDID_ADD_CUSTOM_TPID DPNI_CMD(0x275)
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#define DPNI_CMDID_REMOVE_CUSTOM_TPID DPNI_CMD(0x276)
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#define DPNI_CMDID_GET_CUSTOM_TPID DPNI_CMD(0x277)
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/* Macros for accessing command fields smaller than 1byte */
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#define DPNI_MASK(field) \
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GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
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DPNI_##field##_SHIFT)
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#define dpni_set_field(var, field, val) \
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((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
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#define dpni_get_field(var, field) \
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(((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
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#pragma pack(push, 1)
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struct dpni_cmd_open {
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uint32_t dpni_id;
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};
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struct dpni_cmd_create {
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uint32_t options;
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uint8_t num_queues;
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uint8_t num_tcs;
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uint8_t mac_filter_entries;
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uint8_t pad1;
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uint8_t vlan_filter_entries;
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uint8_t pad2;
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uint8_t qos_entries;
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uint8_t pad3;
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uint16_t fs_entries;
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uint8_t num_rx_tcs;
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uint8_t pad4;
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uint8_t num_cgs;
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};
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struct dpni_cmd_destroy {
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uint32_t dpsw_id;
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};
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#define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order))
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struct dpni_cmd_pool {
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uint16_t dpbp_id;
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uint8_t priority_mask;
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uint8_t pad;
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};
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struct dpni_cmd_set_pools {
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uint8_t num_dpbp;
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uint8_t backup_pool_mask;
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uint16_t pad;
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struct dpni_cmd_pool pool[8];
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uint16_t buffer_size[8];
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};
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/* The enable indication is always the least significant bit */
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#define DPNI_ENABLE_SHIFT 0
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#define DPNI_ENABLE_SIZE 1
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struct dpni_rsp_is_enabled {
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uint8_t enabled;
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};
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struct dpni_cmd_set_irq_enable {
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uint8_t enable;
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uint8_t pad[3];
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uint8_t irq_index;
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};
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struct dpni_cmd_get_irq_enable {
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uint32_t pad;
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uint8_t irq_index;
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};
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struct dpni_rsp_get_irq_enable {
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uint8_t enabled;
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};
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struct dpni_cmd_set_irq_mask {
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uint32_t mask;
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uint8_t irq_index;
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};
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struct dpni_cmd_get_irq_mask {
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uint32_t pad;
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uint8_t irq_index;
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};
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struct dpni_rsp_get_irq_mask {
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uint32_t mask;
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};
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struct dpni_cmd_get_irq_status {
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uint32_t status;
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uint8_t irq_index;
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};
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struct dpni_rsp_get_irq_status {
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uint32_t status;
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};
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struct dpni_cmd_clear_irq_status {
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uint32_t status;
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uint8_t irq_index;
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};
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struct dpni_rsp_get_attr {
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/* response word 0 */
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uint32_t options;
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uint8_t num_queues;
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uint8_t num_rx_tcs;
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uint8_t mac_filter_entries;
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uint8_t num_tx_tcs;
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/* response word 1 */
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uint8_t vlan_filter_entries;
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uint8_t pad1;
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uint8_t qos_entries;
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uint8_t pad2;
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uint16_t fs_entries;
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uint16_t pad3;
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/* response word 2 */
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uint8_t qos_key_size;
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uint8_t fs_key_size;
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uint16_t wriop_version;
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uint8_t num_cgs;
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};
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#define DPNI_ERROR_ACTION_SHIFT 0
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#define DPNI_ERROR_ACTION_SIZE 4
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#define DPNI_FRAME_ANN_SHIFT 4
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#define DPNI_FRAME_ANN_SIZE 1
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struct dpni_cmd_set_errors_behavior {
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uint32_t errors;
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/* from least significant bit: error_action:4, set_frame_annotation:1 */
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uint8_t flags;
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};
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/* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
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* buffer layouts, but they all share the same parameters.
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* If one of the functions changes, below structure needs to be split.
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*/
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#define DPNI_PASS_TS_SHIFT 0
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#define DPNI_PASS_TS_SIZE 1
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#define DPNI_PASS_PR_SHIFT 1
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#define DPNI_PASS_PR_SIZE 1
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#define DPNI_PASS_FS_SHIFT 2
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#define DPNI_PASS_FS_SIZE 1
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#define DPNI_PASS_SWO_SHIFT 3
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#define DPNI_PASS_SWO_SIZE 1
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struct dpni_cmd_get_buffer_layout {
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uint8_t qtype;
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};
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struct dpni_rsp_get_buffer_layout {
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/* response word 0 */
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uint8_t pad0[6];
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/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
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uint8_t flags;
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uint8_t pad1;
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/* response word 1 */
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uint16_t private_data_size;
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uint16_t data_align;
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uint16_t head_room;
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uint16_t tail_room;
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};
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struct dpni_cmd_set_buffer_layout {
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/* cmd word 0 */
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uint8_t qtype;
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uint8_t pad0[3];
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uint16_t options;
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/* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
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uint8_t flags;
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uint8_t pad1;
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/* cmd word 1 */
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uint16_t private_data_size;
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uint16_t data_align;
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uint16_t head_room;
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uint16_t tail_room;
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};
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struct dpni_cmd_set_offload {
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uint8_t pad[3];
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uint8_t dpni_offload;
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uint32_t config;
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};
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struct dpni_cmd_get_offload {
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uint8_t pad[3];
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uint8_t dpni_offload;
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};
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struct dpni_rsp_get_offload {
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uint32_t pad;
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uint32_t config;
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};
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struct dpni_cmd_get_qdid {
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uint8_t qtype;
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};
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struct dpni_rsp_get_qdid {
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uint16_t qdid;
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};
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struct dpni_rsp_get_sp_info {
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uint16_t spids[2];
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};
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struct dpni_rsp_get_tx_data_offset {
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uint16_t data_offset;
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};
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struct dpni_cmd_get_statistics {
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uint8_t page_number;
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uint16_t param;
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};
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struct dpni_rsp_get_statistics {
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uint64_t counter[7];
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};
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struct dpni_cmd_set_link_cfg {
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uint64_t pad0;
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uint32_t rate;
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uint32_t pad1;
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uint64_t options;
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uint64_t advertising;
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};
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#define DPNI_LINK_STATE_SHIFT 0
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#define DPNI_LINK_STATE_SIZE 1
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#define DPNI_STATE_VALID_SHIFT 1
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#define DPNI_STATE_VALID_SIZE 1
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struct dpni_rsp_get_link_state {
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uint32_t pad0;
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/* from LSB: up:1 */
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uint8_t flags;
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uint8_t pad1[3];
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uint32_t rate;
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uint32_t pad2;
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uint64_t options;
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uint64_t supported;
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uint64_t advertising;
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};
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struct dpni_cmd_set_max_frame_length {
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uint16_t max_frame_length;
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};
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struct dpni_rsp_get_max_frame_length {
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uint16_t max_frame_length;
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};
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struct dpni_cmd_set_multicast_promisc {
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uint8_t enable;
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};
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struct dpni_rsp_get_multicast_promisc {
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uint8_t enabled;
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};
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struct dpni_cmd_set_unicast_promisc {
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uint8_t enable;
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};
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struct dpni_rsp_get_unicast_promisc {
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uint8_t enabled;
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};
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struct dpni_cmd_set_primary_mac_addr {
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uint16_t pad;
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uint8_t mac_addr[6];
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};
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struct dpni_rsp_get_primary_mac_addr {
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uint16_t pad;
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uint8_t mac_addr[6];
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};
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struct dpni_rsp_get_port_mac_addr {
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uint16_t pad;
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uint8_t mac_addr[6];
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};
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struct dpni_cmd_add_mac_addr {
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uint16_t pad;
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uint8_t mac_addr[6];
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};
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struct dpni_cmd_remove_mac_addr {
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uint16_t pad;
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uint8_t mac_addr[6];
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};
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#define DPNI_UNICAST_FILTERS_SHIFT 0
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#define DPNI_UNICAST_FILTERS_SIZE 1
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#define DPNI_MULTICAST_FILTERS_SHIFT 1
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#define DPNI_MULTICAST_FILTERS_SIZE 1
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struct dpni_cmd_clear_mac_filters {
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/* from LSB: unicast:1, multicast:1 */
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uint8_t flags;
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};
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struct dpni_cmd_enable_vlan_filter {
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/* only the LSB */
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uint8_t en;
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};
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struct dpni_cmd_vlan_id {
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uint32_t pad;
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uint16_t vlan_id;
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};
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#define DPNI_SEPARATE_GRP_SHIFT 0
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#define DPNI_SEPARATE_GRP_SIZE 1
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#define DPNI_MODE_1_SHIFT 0
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#define DPNI_MODE_1_SIZE 4
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#define DPNI_MODE_2_SHIFT 4
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#define DPNI_MODE_2_SIZE 4
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struct dpni_cmd_set_tx_priorities {
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uint16_t flags;
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uint8_t prio_group_A;
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uint8_t prio_group_B;
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uint32_t pad0;
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uint8_t modes[4];
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uint32_t pad1;
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uint64_t pad2;
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uint16_t delta_bandwidth[8];
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};
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#define DPNI_DIST_MODE_SHIFT 0
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#define DPNI_DIST_MODE_SIZE 4
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#define DPNI_MISS_ACTION_SHIFT 4
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#define DPNI_MISS_ACTION_SIZE 4
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#define DPNI_KEEP_HASH_KEY_SHIFT 7
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#define DPNI_KEEP_HASH_KEY_SIZE 1
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#define DPNI_KEEP_ENTRIES_SHIFT 6
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#define DPNI_KEEP_ENTRIES_SIZE 1
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struct dpni_cmd_set_rx_tc_dist {
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uint16_t dist_size;
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uint8_t tc_id;
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/* from LSB: dist_mode:4, miss_action:4 */
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uint8_t flags;
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uint8_t pad0;
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/* only the LSB */
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uint8_t keep_hash_key;
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uint16_t default_flow_id;
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uint64_t pad1[5];
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uint64_t key_cfg_iova;
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};
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struct dpni_cmd_get_queue {
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uint8_t qtype;
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uint8_t tc;
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uint8_t index;
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};
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#define DPNI_DEST_TYPE_SHIFT 0
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#define DPNI_DEST_TYPE_SIZE 4
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#define DPNI_CGID_VALID_SHIFT 5
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#define DPNI_CGID_VALID_SIZE 1
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#define DPNI_STASH_CTRL_SHIFT 6
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#define DPNI_STASH_CTRL_SIZE 1
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#define DPNI_HOLD_ACTIVE_SHIFT 7
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#define DPNI_HOLD_ACTIVE_SIZE 1
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struct dpni_rsp_get_queue {
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/* response word 0 */
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uint64_t pad0;
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/* response word 1 */
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uint32_t dest_id;
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uint16_t pad1;
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uint8_t dest_prio;
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/* From LSB:
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* dest_type:4, pad:1, cgid_valid:1, flc_stash_ctrl:1, hold_active:1
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*/
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uint8_t flags;
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/* response word 2 */
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uint64_t flc;
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/* response word 3 */
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uint64_t user_context;
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/* response word 4 */
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uint32_t fqid;
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uint16_t qdbin;
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uint16_t pad2;
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/* response word 5*/
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uint8_t cgid;
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};
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struct dpni_cmd_set_queue {
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/* cmd word 0 */
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uint8_t qtype;
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uint8_t tc;
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uint8_t index;
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uint8_t options;
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uint32_t pad0;
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/* cmd word 1 */
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uint32_t dest_id;
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uint16_t pad1;
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uint8_t dest_prio;
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uint8_t flags;
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/* cmd word 2 */
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uint64_t flc;
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/* cmd word 3 */
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uint64_t user_context;
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/* cmd word 4 */
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uint8_t cgid;
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};
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#define DPNI_DISCARD_ON_MISS_SHIFT 0
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#define DPNI_DISCARD_ON_MISS_SIZE 1
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#define DPNI_KEEP_QOS_ENTRIES_SHIFT 1
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#define DPNI_KEEP_QOS_ENTRIES_SIZE 1
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struct dpni_cmd_set_qos_table {
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uint32_t pad;
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uint8_t default_tc;
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/* only the LSB */
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uint8_t discard_on_miss;
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uint16_t pad1[21];
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uint64_t key_cfg_iova;
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};
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struct dpni_cmd_add_qos_entry {
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uint16_t pad;
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uint8_t tc_id;
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uint8_t key_size;
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uint16_t index;
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uint16_t pad2;
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uint64_t key_iova;
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uint64_t mask_iova;
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};
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struct dpni_cmd_remove_qos_entry {
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uint8_t pad1[3];
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uint8_t key_size;
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uint32_t pad2;
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uint64_t key_iova;
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uint64_t mask_iova;
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};
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struct dpni_cmd_add_fs_entry {
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uint16_t options;
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uint8_t tc_id;
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uint8_t key_size;
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uint16_t index;
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uint16_t flow_id;
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uint64_t key_iova;
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uint64_t mask_iova;
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uint64_t flc;
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};
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struct dpni_cmd_remove_fs_entry {
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uint16_t pad1;
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uint8_t tc_id;
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uint8_t key_size;
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uint32_t pad2;
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uint64_t key_iova;
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uint64_t mask_iova;
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};
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struct dpni_cmd_clear_fs_entries {
|
|
uint16_t pad;
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uint8_t tc_id;
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|
};
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#define DPNI_DROP_ENABLE_SHIFT 0
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#define DPNI_DROP_ENABLE_SIZE 1
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#define DPNI_DROP_UNITS_SHIFT 2
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#define DPNI_DROP_UNITS_SIZE 2
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struct dpni_early_drop {
|
|
/* from LSB: enable:1 units:2 */
|
|
uint8_t flags;
|
|
uint8_t pad0[3];
|
|
uint32_t pad1;
|
|
uint8_t green_drop_probability;
|
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uint8_t pad2[7];
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uint64_t green_max_threshold;
|
|
uint64_t green_min_threshold;
|
|
uint64_t pad3;
|
|
uint8_t yellow_drop_probability;
|
|
uint8_t pad4[7];
|
|
uint64_t yellow_max_threshold;
|
|
uint64_t yellow_min_threshold;
|
|
uint64_t pad5;
|
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uint8_t red_drop_probability;
|
|
uint8_t pad6[7];
|
|
uint64_t red_max_threshold;
|
|
uint64_t red_min_threshold;
|
|
};
|
|
|
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struct dpni_cmd_early_drop {
|
|
uint8_t qtype;
|
|
uint8_t tc;
|
|
uint8_t pad[6];
|
|
uint64_t early_drop_iova;
|
|
};
|
|
|
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struct dpni_rsp_get_api_version {
|
|
uint16_t major;
|
|
uint16_t minor;
|
|
};
|
|
|
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struct dpni_cmd_get_taildrop {
|
|
uint8_t congestion_point;
|
|
uint8_t qtype;
|
|
uint8_t tc;
|
|
uint8_t index;
|
|
};
|
|
|
|
struct dpni_rsp_get_taildrop {
|
|
/* cmd word 0 */
|
|
uint64_t pad0;
|
|
/* cmd word 1 */
|
|
/* from LSB: enable:1 oal_lo:7 */
|
|
uint8_t enable_oal_lo;
|
|
/* from LSB: oal_hi:5 */
|
|
uint8_t oal_hi;
|
|
uint8_t units;
|
|
uint8_t pad2;
|
|
uint32_t threshold;
|
|
};
|
|
|
|
#define DPNI_OAL_LO_SHIFT 1
|
|
#define DPNI_OAL_LO_SIZE 7
|
|
#define DPNI_OAL_HI_SHIFT 0
|
|
#define DPNI_OAL_HI_SIZE 5
|
|
|
|
struct dpni_cmd_set_taildrop {
|
|
/* cmd word 0 */
|
|
uint8_t congestion_point;
|
|
uint8_t qtype;
|
|
uint8_t tc;
|
|
uint8_t index;
|
|
uint32_t pad0;
|
|
/* cmd word 1 */
|
|
/* from LSB: enable:1 oal_lo:7 */
|
|
uint8_t enable_oal_lo;
|
|
/* from LSB: oal_hi:5 */
|
|
uint8_t oal_hi;
|
|
uint8_t units;
|
|
uint8_t pad2;
|
|
uint32_t threshold;
|
|
};
|
|
|
|
struct dpni_tx_confirmation_mode {
|
|
uint32_t pad;
|
|
uint8_t confirmation_mode;
|
|
};
|
|
|
|
#define DPNI_DEST_TYPE_SHIFT 0
|
|
#define DPNI_DEST_TYPE_SIZE 4
|
|
#define DPNI_CONG_UNITS_SHIFT 4
|
|
#define DPNI_CONG_UNITS_SIZE 2
|
|
|
|
struct dpni_cmd_set_congestion_notification {
|
|
uint8_t qtype;
|
|
uint8_t tc;
|
|
uint8_t pad;
|
|
uint8_t congestion_point;
|
|
uint8_t cgid;
|
|
uint8_t pad2[3];
|
|
uint32_t dest_id;
|
|
uint16_t notification_mode;
|
|
uint8_t dest_priority;
|
|
/* from LSB: dest_type: 4 units:2 */
|
|
uint8_t type_units;
|
|
uint64_t message_iova;
|
|
uint64_t message_ctx;
|
|
uint32_t threshold_entry;
|
|
uint32_t threshold_exit;
|
|
};
|
|
|
|
struct dpni_cmd_get_congestion_notification {
|
|
uint8_t qtype;
|
|
uint8_t tc;
|
|
uint8_t pad;
|
|
uint8_t congestion_point;
|
|
uint8_t cgid;
|
|
};
|
|
|
|
struct dpni_rsp_get_congestion_notification {
|
|
uint64_t pad;
|
|
uint32_t dest_id;
|
|
uint16_t notification_mode;
|
|
uint8_t dest_priority;
|
|
/* from LSB: dest_type: 4 units:2 */
|
|
uint8_t type_units;
|
|
uint64_t message_iova;
|
|
uint64_t message_ctx;
|
|
uint32_t threshold_entry;
|
|
uint32_t threshold_exit;
|
|
};
|
|
|
|
struct dpni_cmd_set_opr {
|
|
uint8_t pad0;
|
|
uint8_t tc_id;
|
|
uint8_t index;
|
|
uint8_t options;
|
|
uint8_t pad1[7];
|
|
uint8_t oloe;
|
|
uint8_t oeane;
|
|
uint8_t olws;
|
|
uint8_t oa;
|
|
uint8_t oprrws;
|
|
};
|
|
|
|
struct dpni_cmd_get_opr {
|
|
uint8_t pad;
|
|
uint8_t tc_id;
|
|
uint8_t index;
|
|
};
|
|
|
|
#define DPNI_RIP_SHIFT 0
|
|
#define DPNI_RIP_SIZE 1
|
|
#define DPNI_OPR_ENABLE_SHIFT 1
|
|
#define DPNI_OPR_ENABLE_SIZE 1
|
|
#define DPNI_TSEQ_NLIS_SHIFT 0
|
|
#define DPNI_TSEQ_NLIS_SIZE 1
|
|
#define DPNI_HSEQ_NLIS_SHIFT 0
|
|
#define DPNI_HSEQ_NLIS_SIZE 1
|
|
|
|
struct dpni_rsp_get_opr {
|
|
uint64_t pad0;
|
|
/* from LSB: rip:1 enable:1 */
|
|
uint8_t flags;
|
|
uint16_t pad1;
|
|
uint8_t oloe;
|
|
uint8_t oeane;
|
|
uint8_t olws;
|
|
uint8_t oa;
|
|
uint8_t oprrws;
|
|
uint16_t nesn;
|
|
uint16_t pad8;
|
|
uint16_t ndsn;
|
|
uint16_t pad2;
|
|
uint16_t ea_tseq;
|
|
/* only the LSB */
|
|
uint8_t tseq_nlis;
|
|
uint8_t pad3;
|
|
uint16_t ea_hseq;
|
|
/* only the LSB */
|
|
uint8_t hseq_nlis;
|
|
uint8_t pad4;
|
|
uint16_t ea_hptr;
|
|
uint16_t pad5;
|
|
uint16_t ea_tptr;
|
|
uint16_t pad6;
|
|
uint16_t opr_vid;
|
|
uint16_t pad7;
|
|
uint16_t opr_id;
|
|
};
|
|
|
|
struct dpni_cmd_add_custom_tpid {
|
|
uint16_t pad;
|
|
uint16_t tpid;
|
|
};
|
|
|
|
struct dpni_cmd_remove_custom_tpid {
|
|
uint16_t pad;
|
|
uint16_t tpid;
|
|
};
|
|
|
|
struct dpni_rsp_get_custom_tpid {
|
|
uint16_t tpid1;
|
|
uint16_t tpid2;
|
|
};
|
|
|
|
#define DPNI_RX_FS_DIST_ENABLE_SHIFT 0
|
|
#define DPNI_RX_FS_DIST_ENABLE_SIZE 1
|
|
struct dpni_cmd_set_rx_fs_dist {
|
|
uint16_t dist_size;
|
|
uint8_t enable;
|
|
uint8_t tc;
|
|
uint16_t miss_flow_id;
|
|
uint16_t pad1;
|
|
uint64_t key_cfg_iova;
|
|
};
|
|
|
|
#define DPNI_RX_HASH_DIST_ENABLE_SHIFT 0
|
|
#define DPNI_RX_HASH_DIST_ENABLE_SIZE 1
|
|
struct dpni_cmd_set_rx_hash_dist {
|
|
uint16_t dist_size;
|
|
uint8_t enable;
|
|
uint8_t tc_id;
|
|
uint32_t pad;
|
|
uint64_t key_cfg_iova;
|
|
};
|
|
|
|
#pragma pack(pop)
|
|
#endif /* _FSL_DPNI_CMD_H */
|