c75f4e6a7a
Added new section in sample app UG for the new VM power management app. Signed-off-by: Alan Carew <alan.carew@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
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.. BSD LICENSE
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Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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* Neither the name of Intel Corporation nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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Sample Applications User Guide
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==============================
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INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS.
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NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT.
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EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS,
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INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY,
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RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,
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MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
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A "Mission Critical Application" is any application in which failure of the Intel Product could result, directly or indirectly, in personal injury or death.
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SHOULD YOU PURCHASE OR USE INTEL'S PRODUCTS FOR ANY SUCH MISSION CRITICAL APPLICATION, YOU SHALL INDEMNIFY AND HOLD INTEL AND ITS SUBSIDIARIES,
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SUBCONTRACTORS AND AFFILIATES, AND THE DIRECTORS, OFFICERS, AND EMPLOYEES OF EACH, HARMLESS AGAINST ALL CLAIMS COSTS, DAMAGES,
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AND EXPENSES AND REASONABLE ATTORNEYS' FEES ARISING OUT OF, DIRECTLY OR INDIRECTLY, ANY CLAIM OF PRODUCT LIABILITY, PERSONAL INJURY,
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OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION,
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WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN,
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MANUFACTURE, OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS.
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Intel may make changes to specifications and product descriptions at any time, without notice.
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Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined".
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Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
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The information here is subject to change without notice.
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Do not finalize a design with this information.
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The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications.
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Current characterized errata are available on request.
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Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
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Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to:
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`http://www.intel.com/design/literature.htm <http://www.intel.com/design/literature.htm>`_.
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Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
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\*Other names and brands may be claimed as the property of others.
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Copyright © 2012 - 2014, Intel Corporation. All rights reserved.
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**Contents**
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.. toctree::
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:maxdepth: 2
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:numbered:
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intro
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cmd_line
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exception_path
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hello_world
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ip_frag
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ipv4_multicast
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ip_reassembly
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kernel_nic_interface
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l2_forward_real_virtual
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l3_forward
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l3_forward_power_man
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l3_forward_access_ctrl
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l3_forward_virtual
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link_status_intr
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load_balancer
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multi_process
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qos_metering
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qos_scheduler
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intel_quickassist
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quota_watermark
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timer
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vmdq_dcb_forwarding
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vhost
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netmap_compatibility
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internet_proto_ip_pipeline
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test_pipeline
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dist_app
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vm_power_management
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**Figures**
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:ref:`Figure 1.Packet Flow <figure_1>`
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:ref:`Figure 2.Kernel NIC Application Packet Flow <figure_2>`
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:ref:`Figure 3.Performance Benchmark Setup (Basic Environment) <figure_3>`
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:ref:`Figure 4.Performance Benchmark Setup (Virtualized Environment) <figure_4>`
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:ref:`Figure 5.Load Balancer Application Architecture <figure_5>`
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:ref:`Figure 5.Example Rules File <figure_5_1>`
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:ref:`Figure 6.Example Data Flow in a Symmetric Multi-process Application <figure_6>`
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:ref:`Figure 7.Example Data Flow in a Client-Server Symmetric Multi-process Application <figure_7>`
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:ref:`Figure 8.Master-slave Process Workflow <figure_8>`
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:ref:`Figure 9.Slave Process Recovery Process Flow <figure_9>`
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:ref:`Figure 10.QoS Scheduler Application Architecture <figure_10>`
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:ref:`Figure 11.Intel®QuickAssist Technology Application Block Diagram <figure_11>`
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:ref:`Figure 12.Pipeline Overview <figure_12>`
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:ref:`Figure 13.Ring-based Processing Pipeline Performance Setup <figure_13>`
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:ref:`Figure 14.Threads and Pipelines <figure_14>`
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:ref:`Figure 15.Packet Flow Through the VMDQ and DCB Sample Application <figure_15>`
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:ref:`Figure 16.QEMU Virtio-net (prior to vhost-net) <figure_16>`
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:ref:`Figure 17.Virtio with Linux* Kernel Vhost <figure_17>`
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:ref:`Figure 18.Vhost-net Architectural Overview <figure_18>`
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:ref:`Figure 19.Packet Flow Through the vhost-net Sample Application <figure_19>`
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:ref:`Figure 20.Packet Flow on TX in DPDK-testpmd <figure_20>`
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:ref:`Figure 21.Test Pipeline Application <figure_21>`
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:ref:`Figure 22.Performance Benchmarking Setup (Basic Environment) <figure_22>`
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:ref:`Figure 23.Distributor Sample Application Layout <figure_23>`
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:ref:`Figure 24.High level Solution <figure_24>`
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:ref:`Figure 25.VM request to scale frequency <figure_25>`
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**Tables**
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:ref:`Table 1.Output Traffic Marking <table_1>`
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:ref:`Table 2.Entity Types <table_2>`
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:ref:`Table 3.Table Types <table_3>`
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