e313ef4c2f
Following commitc7bf62255e("net/mlx5: fix handling link status event") the link state must be up in order for the burst function to be set on the device ops. As the link may take time to move between down and up state it is possible the rte_eth_dev_start call will return with wrong burst function (either null or the empty burst function). Fixing it by forcing the link to be up before returning from device start. In case the link is still not up after 5 seconds fail the function. In addition initialize the burst function on device probe to prevent crashes before the link is up. Fixes:c7bf62255e("net/mlx5: fix handling link status event") Cc: stable@dpdk.org Signed-off-by: Shahaf Shuler <shahafs@mellanox.com> Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
363 lines
13 KiB
C
363 lines
13 KiB
C
/*-
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* BSD LICENSE
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*
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* Copyright 2015 6WIND S.A.
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* Copyright 2015 Mellanox.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of 6WIND S.A. nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef RTE_PMD_MLX5_H_
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#define RTE_PMD_MLX5_H_
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#include <stddef.h>
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#include <stdint.h>
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#include <limits.h>
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#include <net/if.h>
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#include <netinet/in.h>
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#include <sys/queue.h>
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/* Verbs header. */
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/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
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#ifdef PEDANTIC
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#pragma GCC diagnostic ignored "-Wpedantic"
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#endif
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#include <infiniband/verbs.h>
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#ifdef PEDANTIC
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#pragma GCC diagnostic error "-Wpedantic"
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#endif
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#include <rte_pci.h>
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#include <rte_ether.h>
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#include <rte_ethdev_driver.h>
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#include <rte_spinlock.h>
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#include <rte_interrupts.h>
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#include <rte_errno.h>
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#include <rte_flow.h>
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#include "mlx5_utils.h"
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#include "mlx5_rxtx.h"
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#include "mlx5_autoconf.h"
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#include "mlx5_defs.h"
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enum {
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PCI_VENDOR_ID_MELLANOX = 0x15b3,
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};
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enum {
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PCI_DEVICE_ID_MELLANOX_CONNECTX4 = 0x1013,
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PCI_DEVICE_ID_MELLANOX_CONNECTX4VF = 0x1014,
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PCI_DEVICE_ID_MELLANOX_CONNECTX4LX = 0x1015,
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PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF = 0x1016,
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PCI_DEVICE_ID_MELLANOX_CONNECTX5 = 0x1017,
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PCI_DEVICE_ID_MELLANOX_CONNECTX5VF = 0x1018,
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PCI_DEVICE_ID_MELLANOX_CONNECTX5EX = 0x1019,
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PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF = 0x101a,
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};
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struct mlx5_xstats_ctrl {
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/* Number of device stats. */
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uint16_t stats_n;
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/* Index in the device counters table. */
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uint16_t dev_table_idx[MLX5_MAX_XSTATS];
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uint64_t base[MLX5_MAX_XSTATS];
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};
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/* Flow list . */
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TAILQ_HEAD(mlx5_flows, rte_flow);
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/* Default PMD specific parameter value. */
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#define MLX5_ARG_UNSET (-1)
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/*
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* Device configuration structure.
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*
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* Merged configuration from:
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*
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* - Device capabilities,
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* - User device parameters disabled features.
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*/
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struct mlx5_dev_config {
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unsigned int hw_csum:1; /* Checksum offload is supported. */
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unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
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unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */
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unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */
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unsigned int hw_padding:1; /* End alignment padding is supported. */
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unsigned int sriov:1; /* This is a VF or PF with VF devices. */
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unsigned int mps:2; /* Multi-packet send supported mode. */
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unsigned int tunnel_en:1; /* Whether tunnel is supported. */
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unsigned int flow_counter_en:1; /* Whether flow counter is supported. */
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unsigned int cqe_comp:1; /* CQE compression is enabled. */
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unsigned int tso:1; /* Whether TSO is supported. */
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unsigned int tx_vec_en:1; /* Tx vector is enabled. */
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unsigned int rx_vec_en:1; /* Rx vector is enabled. */
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unsigned int mpw_hdr_dseg:1; /* Enable DSEGs in the title WQEBB. */
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unsigned int tso_max_payload_sz; /* Maximum TCP payload for TSO. */
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unsigned int ind_table_max_size; /* Maximum indirection table size. */
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int txq_inline; /* Maximum packet size for inlining. */
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int txqs_inline; /* Queue number threshold for inlining. */
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int inline_max_packet_sz; /* Max packet size for inlining. */
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};
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/**
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* Type of objet being allocated.
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*/
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enum mlx5_verbs_alloc_type {
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MLX5_VERBS_ALLOC_TYPE_NONE,
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MLX5_VERBS_ALLOC_TYPE_TX_QUEUE,
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MLX5_VERBS_ALLOC_TYPE_RX_QUEUE,
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};
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/**
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* Verbs allocator needs a context to know in the callback which kind of
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* resources it is allocating.
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*/
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struct mlx5_verbs_alloc_ctx {
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enum mlx5_verbs_alloc_type type; /* Kind of object being allocated. */
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const void *obj; /* Pointer to the DPDK object. */
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};
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struct priv {
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struct rte_eth_dev *dev; /* Ethernet device of master process. */
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struct ibv_context *ctx; /* Verbs context. */
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struct ibv_device_attr_ex device_attr; /* Device properties. */
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struct ibv_pd *pd; /* Protection Domain. */
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char ibdev_path[IBV_SYSFS_PATH_MAX]; /* IB device path for secondary */
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struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES]; /* MAC addresses. */
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uint16_t vlan_filter[MLX5_MAX_VLAN_IDS]; /* VLAN filters table. */
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unsigned int vlan_filter_n; /* Number of configured VLAN filters. */
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/* Device properties. */
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uint16_t mtu; /* Configured MTU. */
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uint8_t port; /* Physical port number. */
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unsigned int pending_alarm:1; /* An alarm is pending. */
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unsigned int isolated:1; /* Whether isolated mode is enabled. */
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/* RX/TX queues. */
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unsigned int rxqs_n; /* RX queues array size. */
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unsigned int txqs_n; /* TX queues array size. */
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struct mlx5_rxq_data *(*rxqs)[]; /* RX queues. */
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struct mlx5_txq_data *(*txqs)[]; /* TX queues. */
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struct rte_eth_rss_conf rss_conf; /* RSS configuration. */
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struct rte_intr_handle intr_handle; /* Interrupt handler. */
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unsigned int (*reta_idx)[]; /* RETA index table. */
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unsigned int reta_idx_n; /* RETA index size. */
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struct mlx5_hrxq_drop *flow_drop_queue; /* Flow drop queue. */
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struct mlx5_flows flows; /* RTE Flow rules. */
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struct mlx5_flows ctrl_flows; /* Control flow rules. */
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LIST_HEAD(mr, mlx5_mr) mr; /* Memory region. */
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LIST_HEAD(rxq, mlx5_rxq_ctrl) rxqsctrl; /* DPDK Rx queues. */
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LIST_HEAD(rxqibv, mlx5_rxq_ibv) rxqsibv; /* Verbs Rx queues. */
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LIST_HEAD(hrxq, mlx5_hrxq) hrxqs; /* Verbs Hash Rx queues. */
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LIST_HEAD(txq, mlx5_txq_ctrl) txqsctrl; /* DPDK Tx queues. */
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LIST_HEAD(txqibv, mlx5_txq_ibv) txqsibv; /* Verbs Tx queues. */
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/* Verbs Indirection tables. */
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LIST_HEAD(ind_tables, mlx5_ind_table_ibv) ind_tbls;
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uint32_t link_speed_capa; /* Link speed capabilities. */
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struct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */
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rte_spinlock_t lock; /* Lock for control functions. */
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int primary_socket; /* Unix socket for primary process. */
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struct rte_intr_handle intr_handle_socket; /* Interrupt handler. */
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struct mlx5_dev_config config; /* Device configuration. */
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struct mlx5_verbs_alloc_ctx verbs_alloc_ctx;
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/* Context for Verbs allocator. */
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};
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/**
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* Lock private structure to protect it from concurrent access in the
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* control path.
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*
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* @param priv
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* Pointer to private structure.
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*/
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static inline void
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priv_lock(struct priv *priv)
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{
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rte_spinlock_lock(&priv->lock);
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}
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/**
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* Try to lock private structure to protect it from concurrent access in the
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* control path.
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*
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* @param priv
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* Pointer to private structure.
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*
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* @return
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* 1 if the lock is successfully taken; 0 otherwise.
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*/
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static inline int
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priv_trylock(struct priv *priv)
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{
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return rte_spinlock_trylock(&priv->lock);
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}
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/**
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* Unlock private structure.
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*
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* @param priv
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* Pointer to private structure.
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*/
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static inline void
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priv_unlock(struct priv *priv)
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{
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rte_spinlock_unlock(&priv->lock);
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}
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/* mlx5.c */
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int mlx5_getenv_int(const char *);
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/* mlx5_ethdev.c */
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struct priv *mlx5_get_priv(struct rte_eth_dev *dev);
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int mlx5_is_secondary(void);
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int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]);
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int priv_ifreq(const struct priv *, int req, struct ifreq *);
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int priv_is_ib_cntr(const char *);
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int priv_get_cntr_sysfs(struct priv *, const char *, uint64_t *);
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int priv_get_num_vfs(struct priv *, uint16_t *);
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int priv_get_mtu(struct priv *, uint16_t *);
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int priv_set_flags(struct priv *, unsigned int, unsigned int);
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int mlx5_dev_configure(struct rte_eth_dev *);
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void mlx5_dev_infos_get(struct rte_eth_dev *, struct rte_eth_dev_info *);
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const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev);
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int priv_link_update(struct priv *, int);
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int priv_force_link_status_change(struct priv *, int);
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int mlx5_link_update(struct rte_eth_dev *, int);
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int mlx5_dev_set_mtu(struct rte_eth_dev *, uint16_t);
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int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
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int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
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int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,
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struct rte_pci_addr *);
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void mlx5_dev_link_status_handler(void *);
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void mlx5_dev_interrupt_handler(void *);
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void priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
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void priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
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int mlx5_set_link_down(struct rte_eth_dev *dev);
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int mlx5_set_link_up(struct rte_eth_dev *dev);
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int mlx5_is_removed(struct rte_eth_dev *dev);
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eth_tx_burst_t priv_select_tx_function(struct priv *, struct rte_eth_dev *);
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eth_rx_burst_t priv_select_rx_function(struct priv *, struct rte_eth_dev *);
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/* mlx5_mac.c */
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int priv_get_mac(struct priv *, uint8_t (*)[ETHER_ADDR_LEN]);
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void mlx5_mac_addr_remove(struct rte_eth_dev *, uint32_t);
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int mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t,
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uint32_t);
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void mlx5_mac_addr_set(struct rte_eth_dev *, struct ether_addr *);
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/* mlx5_rss.c */
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int mlx5_rss_hash_update(struct rte_eth_dev *, struct rte_eth_rss_conf *);
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int mlx5_rss_hash_conf_get(struct rte_eth_dev *, struct rte_eth_rss_conf *);
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int priv_rss_reta_index_resize(struct priv *, unsigned int);
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int mlx5_dev_rss_reta_query(struct rte_eth_dev *,
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struct rte_eth_rss_reta_entry64 *, uint16_t);
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int mlx5_dev_rss_reta_update(struct rte_eth_dev *,
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struct rte_eth_rss_reta_entry64 *, uint16_t);
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/* mlx5_rxmode.c */
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void mlx5_promiscuous_enable(struct rte_eth_dev *);
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void mlx5_promiscuous_disable(struct rte_eth_dev *);
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void mlx5_allmulticast_enable(struct rte_eth_dev *);
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void mlx5_allmulticast_disable(struct rte_eth_dev *);
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/* mlx5_stats.c */
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void priv_xstats_init(struct priv *);
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int mlx5_stats_get(struct rte_eth_dev *, struct rte_eth_stats *);
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void mlx5_stats_reset(struct rte_eth_dev *);
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int mlx5_xstats_get(struct rte_eth_dev *,
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struct rte_eth_xstat *, unsigned int);
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void mlx5_xstats_reset(struct rte_eth_dev *);
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int mlx5_xstats_get_names(struct rte_eth_dev *,
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struct rte_eth_xstat_name *, unsigned int);
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/* mlx5_vlan.c */
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int mlx5_vlan_filter_set(struct rte_eth_dev *, uint16_t, int);
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int mlx5_vlan_offload_set(struct rte_eth_dev *, int);
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void mlx5_vlan_strip_queue_set(struct rte_eth_dev *, uint16_t, int);
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/* mlx5_trigger.c */
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int mlx5_dev_start(struct rte_eth_dev *);
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void mlx5_dev_stop(struct rte_eth_dev *);
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int priv_dev_traffic_enable(struct priv *, struct rte_eth_dev *);
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int priv_dev_traffic_disable(struct priv *, struct rte_eth_dev *);
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int priv_dev_traffic_restart(struct priv *, struct rte_eth_dev *);
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int mlx5_traffic_restart(struct rte_eth_dev *);
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/* mlx5_flow.c */
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int mlx5_dev_filter_ctrl(struct rte_eth_dev *, enum rte_filter_type,
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enum rte_filter_op, void *);
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int mlx5_flow_validate(struct rte_eth_dev *, const struct rte_flow_attr *,
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const struct rte_flow_item [],
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const struct rte_flow_action [],
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struct rte_flow_error *);
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struct rte_flow *mlx5_flow_create(struct rte_eth_dev *,
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const struct rte_flow_attr *,
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const struct rte_flow_item [],
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const struct rte_flow_action [],
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struct rte_flow_error *);
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int mlx5_flow_destroy(struct rte_eth_dev *, struct rte_flow *,
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struct rte_flow_error *);
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void priv_flow_flush(struct priv *, struct mlx5_flows *);
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int mlx5_flow_flush(struct rte_eth_dev *, struct rte_flow_error *);
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int mlx5_flow_query(struct rte_eth_dev *, struct rte_flow *,
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enum rte_flow_action_type, void *,
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struct rte_flow_error *);
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int mlx5_flow_isolate(struct rte_eth_dev *, int, struct rte_flow_error *);
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int priv_flow_start(struct priv *, struct mlx5_flows *);
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void priv_flow_stop(struct priv *, struct mlx5_flows *);
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int priv_flow_verify(struct priv *);
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int mlx5_ctrl_flow_vlan(struct rte_eth_dev *, struct rte_flow_item_eth *,
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struct rte_flow_item_eth *, struct rte_flow_item_vlan *,
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struct rte_flow_item_vlan *);
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int mlx5_ctrl_flow(struct rte_eth_dev *, struct rte_flow_item_eth *,
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struct rte_flow_item_eth *);
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int priv_flow_create_drop_queue(struct priv *);
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void priv_flow_delete_drop_queue(struct priv *);
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/* mlx5_socket.c */
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int priv_socket_init(struct priv *priv);
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int priv_socket_uninit(struct priv *priv);
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void priv_socket_handle(struct priv *priv);
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int priv_socket_connect(struct priv *priv);
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/* mlx5_mr.c */
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struct mlx5_mr *priv_mr_new(struct priv *, struct rte_mempool *);
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struct mlx5_mr *priv_mr_get(struct priv *, struct rte_mempool *);
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int priv_mr_release(struct priv *, struct mlx5_mr *);
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int priv_mr_verify(struct priv *);
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#endif /* RTE_PMD_MLX5_H_ */
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