cf8a8a8f48
RoCE disabling requirement is based on PCI address. In order to support Sub-Function, a conversion is needed in the case of an auxiliary device. SF device can be probed with such devargs string: auxiliary:mlx5_core.sf.<id>,class=vdpa Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> |
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| .. | ||
| features | ||
| features_overview.rst | ||
| ifc.rst | ||
| index.rst | ||
| mlx5.rst | ||